W83194BR-645 Datasheet, PDF (4/24 Pages) Winbond – CLOCK GENERATOR FOR SIS 645/650 CHIPSET

W83194BR-645
3. PIN CONFIGURATION
VDDR
1
FS0&/REF0
2
FS1&/REF1
3
FS2&/REF2
4
GND
5
XIN
6
XOUT
7
GND
8
ZCLK0
9
ZCLK1
10
VDDZ
11
PCI_STOP#*
12
VDDPCI
13
FS3&/PCICLK_F0
14
FS4&/PCICLK_F1
15
PCICLK0
16
PCICLK1
17
GND
18
VDDPCI
19
PCICLK2
20
PCICLK3
21
PCICLK4
22
PCICLK5
23
GND
24
&: pull-down 120K
* : pull-up 120K
# :input active low
48
VDDSD
47
SDRAM
46
GND
45
CPU_STOP#*
44
CPUCLKT_1
43
CPUCLKC_1
42
VDDC
41
GND
40
CPUCLKT_0
39
CPUCLKC_0
38
IREF
37
GND
36
VDDA
35
SDCLK*
34
SDATA*
33
PD#*/VTT_PWGD
32
GND
31
AGPCLK0
30
AGPCLK1
29
VDDAGP
28
VDD48
27
48MHZ
26
24_48MHZ/ MULTISEL*
25
GND
4. BLOCK DIAGRAM
XIN
XOUT
VTT_PWGD
FS<4:0>
PD#*
PCI_STOP#*
CPU_STOP#*
MULTISEL0*
*SDATA
*SDCLK
PLL2
XTAL
OSC
PLL1
Spread
Spectrum
M/N/Ratio
S.S.P
ROM
Latch
&
POR
Control
Logic
&
Config
Register
I2C
interface
1/2
Mux
VCOCLK
Driver
48MHz
24_48MHz
3
REF0:2
Divider
Stop
Stop
3
CPUCLK_T 0:2
CPUCLK_C 0:2
3
SDRAM
2
ZCLK 0:1
2
AGPCLK 0:1
8 _{PCICLK_F0:1}
PCICLK_0:5
Rref
-2-