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W83781D Datasheet, PDF (36/53 Pages) Winbond – MONITORING IC
W83781D
PRELIMINARY
8.17 FAN IN/OUT and BEEP/GPO# Control Register -- Index 4Dh (Bank 0)
Register Location:
Power on Default Value
Attribute:
Size:
4Dh
<7:0> 0001,0101. Reset by MR.
Read/Write
8 bits
7 6 5 4 32 1 0
FANINC1
FANOPV1
FANINC2
FANOPV2
FANINC3
FANOPV3
GPOSEL
DIS_ABN
Bit 7: Disable power-on abnormal the monitor voltage including V-Core A,, and +3.3V. If these
voltage exceed the limit value, the pin (Open Drain) of BEEP will drives low and high
frequency signal. Write 1, the frequency will be disable. Default 0. After power on, the system
should set this bit to 1 in order to disable BEEP.
Bit 6: BEEP/GPO# Pin Function Select. Write 1 Select GPO# function. Set 0, select BEEP function.
This bit default 0.
Bit 5: FAN 3 output value if FANINC3 sets to 0. Write 1, then pin 18 always generate logic high
signal. Write 0, pin 18 always generates logic low signal. This bit default 0.
Bit 4: FAN 3 Input Control. Set to 1, pin 18 acts as FAN clock input, which is default value. Set to 0,
this pin 18 acts as FAN control signal and the output value of FAN control is set by this register
bit 5. This output pin can connect to power PMOS gate to control FAN ON/OFF.
Bit 3: FAN 2 output value if FANINC2 sets to 0. Write 1, then pin 19 always generate logic high
signal. Write 0, pin 19 always generates logic low signal. This bit default 0.
Bit 2: FAN 2 Input Control. Set to 1, pin 19 acts as FAN clock input, which is default value. Set to 0,
this pin 19 acts as FAN control signal and the output value of FAN control is set by this register
bit 3. This output pin can connect to power NMOS gate to control FAN ON/OFF.
Bit 1: FAN 1 output value if FANINC1 sets to 0. Write 1, then pin 20 always generate logic high
signal. Write 0, pin 20 always generates logic low signal. This bit default 0.
Bit 0: FAN 1 Input Control. Set to 1, pin 20 acts as FAN clock input, which is default value. Set to 0,
this pin 20 acts as FAN control signal and the output value of FAN control is set by this register
bit 1. This output pin can connect to power PMOS gate to control FAN ON/OFF.
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Publication Release Date : Nov. 1997
Revision 0.60