W83781D Datasheet, PDF (10/53 Pages) Winbond – MONITORING IC

W83781D
PRELIMINARY
6. PIN DESCRIPTION
I/O12t
I/O12ts
OUT12t
OUT8t
AOUT
OD8
OD12
OD48
INt
INts
AIN
- TTL level bi-directional pin with 12 mA source-sink capability
- TTL level and schmitt trigger
- TTL level output pin with 12 mA source-sink capability
- TTL level output pin with 8 mA source-sink capability
- Output pin(Analog)
- Open-drain output pin with 8 mA sink capability
- Open-drain output pin with 12 mA sink capability
- Open-drain output pin with 48 mA sink capability
- TTL level input pin
- TTL level input pin and schmitt trigger
- Input pin(Analog)
Pin Name
IOR#
IOW#
CLKIN
D7~D0
VID1
V_CC (+5V)
GNDD
MR
CASEOPEN
VID4
FAN3-FAN1
IN/OUT
SCL
SDA
RSTOUT#
Pin
Type
No.
Description
1
IN_{t s}
An active low standard ISA bus I/O Read Control.
2
IN_{t s}
An active low standard ISA bus I/O Write Control.
3
IN _t
System clock input. Can select 48MHz or 24MHz or 14.318MHz.
The default is 24MHz.
4-
I/O_12t
Bi-directional ISA bus Data lines. D0 corresponds to the low order
11
bit, with D7 the high order bit.
12
IN_t
Voltage Supply readouts from P6.This value is read in the VID/Fan
Divisor Register.
13 POWER +5V V_CC power. Bypass with the parallel combination of 10µF
(electrolytic or tantalum) and 0.1µF (ceramic) bypass capacitors.
14 DGROUND Internally connected to all digital circuitry.
15
IN_{t s}
Master reset input.
16
I/O_12t
CASE OPEN. An active high input from an external circuit which
latches a Case Open event. This line can go high without any
clamping action intrusion regardless of the powered state of the
W83781D. The W83781D provides an internal open drain on this
line, controlled by Bit 7 of IRQ Mask Register 2, to provide a
minimum 20 ms reset of this line.
17
IN _t
Voltage Supply readouts from P6.This value is read in the bit <0>
of Device ID Register.
18-
I/O_12ts
0V to +5V amplitude fan tachometer input /
20
Fan on-off control output. These multifunctional pins can be
programmable input or output.
21
IN_{t s}
Serial Bus Clock.
22
I/O_12ts Serial Bus bi-directional Data.
23
OUT_8t 8 mA driver (open drain), active low output with a 20 ms minimum
pulse width. Available when enabled via Bit 7 in SMI# Mask
Register 2.
-5-
Publication Release Date : Nov. 1997
Revision 0.60