W83781D Datasheet, PDF (15/53 Pages) Winbond – MONITORING IC

W83781D
PRELIMINARY
7.1.2 The serial bus timing of the temperature 2 and 3 is shown as follow:
(a) Typical 2-byte read from preset pointer location (Temp, T_OS, T_HYST)
0
SCL
SDA
0
Start By
Master
101101
Frame 1
Serial Bus Address Byte
78
R/W
Ack
by
781D
0 _...
7 8 0 _...
7
D7 ... D1 D0
Frame 2
MSB Data Byte
Ack
by
Master
D7 ... D1 D0
Frame 3
LSB Data Byte
Ack
by
Master
Stop by
Master
Typical 2-Byte Read From Preset Pointer Location
(b) Typical pointer set followed by immediate read for 2-byte register (Temp, T_OS, T_HYST)
0
SCL
780
4
SDA
1 0 0 1 A2 A1 A0 R/W
0 0 0 0 0 0 D1 D0
Start By
Master
Frame 1
Ack
by
Serial Bus Address Byte
781D
Ack
Frame 2
by
Pointer Byte
781D
0
SCL
SDA
1
Start By
Master
7 8 0 _...
7 8 0 _...
7
0 0 1 A2 A1 A0 R/W
Ack
Frame 3
by
Serial Bus Address Byte
781D
D7 ... D1 D0
Frame 4
MSB Data Byte
Ack
by
Master
D7 ... D1 D0
Frame 5
LSB Data Byte
No Ack
by
Master
0
Typical Pointer Set Followed by Immediate Read for 2-Byte Register
Stop by
Master
(c) Typical read 1-byte from configuration register with preset pointer
0
SCL
SDA
1
Start By
Master
780
78
0 0 1 A2 A1 A0 R/W
D7 D6 D5 D4 D3 D2 D1 D0
Frame 1
Serial Bus Address Byte
Ack
by
Frame 2
781D
Data Byte
No Ack
by
Master
Stop by
Master
Typical 1-Byte Read From Configuration With Reset Pointer
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Publication Release Date : Nov. 1997
Revision 0.60