W9864G6JT Datasheet, PDF (35/42 Pages) Winbond – 1M  4 BANKS  16 BITS SDRAM

11.15 Auto-precharge Timing (Read Cycle)
W9864G6JT
0 1 2 3 4 5 6 7 8 9 10 11
(1) CAS Latency =2
( a ) burst length = 1
Command _{Read AP}
Act
tRP
DQ
Q0
( b ) burst length = 2
Command _Read
DQ
AP
Act
tRP
Q0 Q1
( c ) burst length = 4
Command _Read
DQ
AP
Act
tRP
Q0 Q1 Q2 Q3
( d ) burst length = 8
Command _Read
DQ
AP
Act
tRP
Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7
(2) CAS Latency =3
( a ) burst length = 1
Command
Read
AP
DQ
( b ) burst length = 2
Command
Read
DQ
( c ) burst length = 4
Command Read
DQ
( d ) burst length = 8
Command
Read
DQ
Act
tRP
Q0
AP
tRP
Q0 Q1
AP
Q0 Q1
Q0 Q1
Act
tRP
Q2 Q3
Q2 Q3
Act
Q4
AP
Q5
tRP
Q6 Q7
Act
Note )
Read
AP
Act
represents the Read w ith Auto precharge command.
represents the start of internal precharging.
represents the Bank Activate command.
When the Auto precharge command is asserted, the period from Bank Activate command to
the start of internal precgarging must be at least t RAS(min).
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Publication Release Date: Dec. 23, 2011
Revision A01