W9864G6JT Datasheet, PDF (22/42 Pages) Winbond – 1M  4 BANKS  16 BITS SDRAM

W9864G6JT
11.2 Interleaved Bank Read (Burst Length = 4, CAS Latency = 3, Auto-precharge)
CLK
0
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15 16 17 18 19 20 21 22 23
CS
RAS
CAS
tRC
tRAS
tRC
tRP
tRAS
tRC
tRC
tRAS
tRP
tRP
WE
BS0
BS1
tRCD
tRCD
A10 RAa
RBb
RAc
tRCD
RBd
tRCD
RAe
A0-A9,
A11
RAa
DQM
CKE
DQ
CAw RBb
CBx
RAc
CAy
RBd
CBz
RAe
tAC
aw0 aw1 aw2 aw3
tAC
tAC
bx0 bx1 bx2 bx3
cy0 cy1 cy2 cy3
tAC
dz0
tRRD
tRRD
tRRD
tRRD
Bank #0 Active
Bank #1
Bank #2
Idle
Bank #3
Read
Active
AP*
Active
Read
Read
AP*
AP*
Active
Read
Active
* AP is the internal precharge start timing
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Publication Release Date: Dec. 23, 2011
Revision A01