W986432AH Datasheet, PDF (35/44 Pages) Winbond – 512K x 4 BANKS x 32 BITS SDRAM

W986432AH
Auto-precharge Timing (Read Cycle)
0 1 2 3 4 5 6 7 8 9 10 11
(1) CAS Latency=2
( a ) burst length = 1
Command _{Read AP}
Act
tRP
DQ
Q0
( b ) burst length = 2
Command
Read
AP
Act
tRP
DQ
Q0 Q1
( c ) burst length = 4
Command
DQ
( d ) burst length = 8
Read
AP
Act
tRP
Q0 Q1 Q2 Q3
Command
DQ
Read
AP
Act
tRP
Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7
(2) CAS Latency=3
( a ) burst length = 1
Command Read AP
DQ
Act
tRP
Q0
( b ) burst length = 2
Command
DQ
Read
AP
Act
tRP
Q0 Q1
( c ) burst length = 4
Command
DQ
Read
AP
Act
tRP
Q0 Q1 Q2 Q3
( d ) burst length = 8
Command
DQ
Read
AP
Act
tRP
Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7
Note:
Read
represents the Read with Auto precharge command.
AP
represents the start of internal precharging.
Act
represents the Bank Activate command.
When the Auto precharge command is asserted, the period from Bank Activate command to
the start of internal precgarging must be at least Rt AS (min).
- 35 -
Publication Release Date: December 1999
Revision A1