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W28F641B Datasheet, PDF (27/31 Pages) Winbond – 64MBIT (4MBIT × 16) PAGE MODE DUAL WORK FLASH MEMORY
W28F641B/T
4. A latency time is required from writing suspend command (#WE or #CE going high) until SR.7 going "1".
5. If the interval time from a Block Erase Resume command to a subsequent Block Erase Suspend command is shorter than
tERES and its sequence is repeated, the block erase operation may not be finished.
5. ADDITIONAL INFORMATION
Recommended Operating Conditions
At Device Power-Up
AC timing illustrated in Figure A-1 is recommended for the supply voltages and the control signals at
device power-up. If the timing in the figure is ignored, the device may not operate correctly.
VDD
#RESET (p)
VDD (min)
Vss
VIH
V IL
Vpp
*1
(V)
V PPH1/2
Vss
VIH
ADDRESS (A) VIL
VIH
#CE (E)
VIL
VIH
#WE (W)
VIL
VIH
#OE (G) VIL
#WP
VIH
(S)
VIL
VOH
DATA (D/Q)
VOL
tVR
t2VPH
t PHQV
tR or tF
tAVQV
Valid Address
tF
t ELQV
tR or tF
tR
tF
t GLQV
tR
HIGH Z
Valid Output
*1 To prevent the unwanted writes, system designers should consider the design, which applies VPP to 0V during read
operations and VPPH1/2 during write or erase operations.
Figure A-1. AC Timing at Device Power-up
For the AC specifications tVR, tR, tF in the figure, refer to the next page. See the “ELECTRICAL SPECIFICATIONS“ described in
specifications for the supply voltage range, the operating temperature and the AC specifications not shown in the next page.
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Publication Release Date: March 27, 2003
Revision A3