W9816G6IH_10 Datasheet, PDF (23/42 Pages) Winbond – 512K × 2 BANKS × 16 BITS SDRAM

W9816G6IH
11.3 Interleaved Bank Read (Burst Length = 8, CAS Latency = 3)
CLK
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23
CS
tRC
RAS
t RAS
tRP
tRP
tRAS
CAS
WE
BA
A10 RAa
t RCD
RBb
t RCD
RAc
t RCD
A0-A9 RAa
DQM
CKE
DQ
Bank #0 ^Active
Bank #1
CAx
RBb
CBy
RAc
CAz
t RRD
tAC
tAC
ax0 ax1 ax2 ax3 ax4 ax5 ax6 by0 by1
tRRD
tAC
by4 by5 by6 by7 CZ0
Read
Precharge
Active
Read
Precharge
Active
Read
Precharge
- 23 -
Publication Release Date: Mar. 22, 2010
Revision A02