W9816G6IH_10 Datasheet, PDF (16/42 Pages) Winbond – 512K × 2 BANKS × 16 BITS SDRAM

W9816G6IH
Notes:
1. Operation exceeds " Absolute Maximum Ratings " may cause permanent damage to the devices.
2. All voltages are referenced to VSS.
• 2.7V~3.6V power supply for -7/-7I speed grade.
• 3.3V ± 0.3V power supply for -5/-6/-6I/-6A speed grades.
3. These parameters depend on the cycle rate and listed values are measured at a cycle rate with the
minimum values of t_CK and t_RC.
4. These parameters depend on the output loading conditions. Specified values are obtained with
output open.
5. Power up sequence please refer to "Functional Description" section described before.
6. AC Test Load diagram.
1.4 V
50 ohms
output
Z = 50 ohms
30pF
AC TEST LOAD
7. t_HZ defines the time at which the outputs achieve the open circuit condition and is not referenced
to output level.
8. Assumed input rise and fall time (t_T ) = 1nS.
If tr & tf is longer than 1nS, transient time compensation should be considered,
i.e., [(tr + tf)/2-1]nS should be added to the parameter
( The t_T maximum can’t be more than 10nS for low frequency application. )
9. If clock rising time (t_T) is longer than 1nS, (t_T /2-0.5)nS should be added to the parameter.
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Publication Release Date: Mar. 22, 2010
Revision A02