W83L784R_05 Datasheet, PDF (12/52 Pages) Winbond – Monitoring IC

W83L784R/ W83L784G
(c) Serial bus read from a register with the internal address register prefer to desired location
0
SCL
780
78
SDA
0
Start By
Master
10110
Frame 1
Serial Bus Address Byte
1 R/W
D7 D6 D5 D4 D3 D2 D1 D0
Ack
by
Frame 2
784R
Internal Index Register Byte
Ack
by Stop by
Master ^Master
0
Figure 3. Serial Bus Read from Internal Address Register
6.2.2 The serial bus timing of the temperature CPUT1 and CPUT2 is shown as follow:
(a) Typical 2-byte read from preset pointer location (Temp, T_OS, T_HYST)
0
SCL
SDA
0
Start By
Master
1
01
1
0
Frame 1
Serial Bus Address Byte
780
780
7
...
...
1 R/W
D7 ...
D1 D0
D7 ...
D1 D0
Ack
Ack
by
by
Frame 2
Master
784R
MSB Data Byte
Frame 3
LSB Data Byte
No Ack
by
Master
Stop by
Master
Figure 4. Typical 2-Byte Read From Preset Pointer Location
(b)Typical pointer set followed by immediate read for 2-byte register (Temp, T_OS, T_HYST)
0
SCL
780
4
SDA
1 0 0 1 A2 A1 A0 R/W
0 0 0 0 0 0 D1 D0
Start By
Master
Frame 1
Ack
Ack
by
Frame 2
by
Serial Bus Address Byte
784R
Pointer Byte
784R
0
SCL
SDA
1
Start By
Master
0 0 1 A2 A1
Frame 3
Serial Bus Address Byte
78
A0 R/W
Ack
by
784R
0
0
...
78
D7 ...
D1 D0
Frame 4
MSB Data Byte
Ack
by
Master
0
7
...
D7 ...
D1 D0
Frame 5
LSB Data Byte
No Ack
by
Master
Stop by
Master
Figure 5. Typical Pointer Set Followed by Immediate Read for 2-Byte Register
Publication Release Date: Jan. 2005
-7-
Revision 1.1