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W83L784R_05 Datasheet, PDF (11/52 Pages) Winbond – Monitoring IC
W83L784R/ W83L784G
6. FUNCTIONAL DESCRIPTION
6.1 General Description
The W83L784R/G provides at most 4 analog positive inputs, 2 fan speed monitors, 2 sets for fan
PWM (Pulse Width Modulation) Smart Fan Control , 2 remote thermal inputs from remote thermistors
or 2N3904 transistors or PentiumTM II (Deschutes) thermal diode outputs and one on-chip thermal
detection. W83L784R/G also provides the power good (reset) output for 3V and 5V power detection
and two fault output pins issuing hardware warning if battery and fans become abnormal. When
starting the monitor function on the chip, the watch dog machine monitor every function and store the
value to registers. If the monitor value exceeds the limit value, the interrupt status will be set to 1.
6.2 Access Interface
The W83L784R/G provides I2C Serial Bus to read/write internal registers. In the W83L784R/G there
are three serial bus addresses. The first address defined at CR [4Ah] can read/write all registers
excluding CPUT1/CPUT2 temperature sensor registers and its address default value is 0101101. The
address for CPUT1 defined at CR [4Bh] bit2-0 only read/write CPUT1 temperature sensor registers
and the address default value is 1001001. The address for CPUT2 defined at CR [4Bh] bit2-0 only
read/write CPUT1 temperature sensor registers and the address default value is 1001000.
6.2.1 The first serial bus access timing is shown as follows:
(a) Serial bus write to internal address register followed by the data byte
0
SCL
780
78
SDA
0
Start By
Master
10110
Frame 1
Serial Bus Address Byte
SCL (Continued)
1 R/W
D7 D6 D5 D4 D3 D2 D1 D0
Ack
Ack
by
by
Frame 2
784R
784R
Internal Index Register Byte
0
78
SDA (Continued)
D7 D6 D5 D4 D3 D2 D1 D0
Ack
by
784R
Frame 3
Data Byte
Stop
by
Master
Figure 1. Serial Bus Write to Internal Address Register followed by the Data Byte
(b) Serial bus write to internal address register only
0
SCL
780
78
SDA
0
Start By
Master
1
01
1
0
Frame 1
Serial Bus Address Byte
1 R/W
D7 D6 D5 D4 D3 D2 D1 D0
Ack
by
Frame 2
784R
Internal Index Register Byte
Ack
by
784R
Stop by
Master
0
Figure 2. Serial Bus Write to Internal Address Register Only
Publication Release Date: Jan. 2005
-6-
Revision 1.1