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VSC6511 Datasheet, PDF (12/22 Pages) Vitesse Semiconductor Corporation – SMPTE-292M Serializer, Deserializer, and Deserializer/Reclocker at 1.485Gb/s
VITESSE
SEMICONDUCTOR CORPORATION
SMPTE-292M Serializer, Deserializer, and
Deserializer/Reclocker at 1.485Gb/s
Advance Product Information
VSC6511
Features: Deserializer / Reclocker Mode
1. Compliant with SMPTE-292M @ 1.485Gb/s
2. Clock and Data Recovery
3. 1:20 Deserializer
4. Descrambler and NRZI Decoder with ENABLE
5. Data Framer aligns data to SAV/EAV
6. 2 or 4 User Configurable 75 ohm cable driver outputs
7. On-chip Clock Multiplier Unit
8. LINE, FRAME, HANC Indication
9. CRC Checker
10. 20 Bit TTL Interface @ 74.25 MHz
11. On-chip Clock Multiplier and Recovery Unit
12. 3.3V, 900mW -- typical power.
General Description
In the Deserializer/Reclocker Mode, both the Deserializer and the Reclocker are active. All the features of
each function are available with the exception of the reclocker status/control pins on the databus D0 and D2. In
this mode, D[0:19] is used solely for the deserialized recovered data. Also, RCLK is used for the deserializer’s
recovered clock and will not provide a buffered version of REFCLK and the BYPASS capability is also not
available.
Figure 7: Block Diagram: Deserializer/Reclocker Mode
D[19:0]
SCREN
OE0
SDO0
SDO0
ISET0
OE1
SDO1
SDO1
ISET1
CABLE DRIVER
OUTPUTS
SDI
SDI
REFCLK
74.25 MHz
Clock
Recovery
Unit
Deserializer
1.485 GHz
/20
Clock
Multiply
x20
1.485 GHz
NRZI Decoder
Descrambler
CRC Check D Q
Framer
SIGDET
CRCERR
LINE
FRAME
HANC
RCLK
Page 12
© VITESSE SEMICONDUCTOR CORPORATION
741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896
G52311-0, Rev 2.0
4/10/00