TX19A Datasheet, PDF (8/491 Pages) Toshiba Semiconductor – 32Bit TX System RISC

Chapter 1 Introduction
1.2 What Is RISC?
Until the early 1980s, all CPUs followed the complex instruction set computer (CISC) design
philosophy. To preserve compatibility with the existing pool of software, CISC processors evolved
by adding new types of machine instructions and more intricate operations. Generally, CISC refers
to CPUs with hundreds of instructions designed for every possible situation. Designing CPUs with
hundreds of instructions not only requires many transistors but is also very complicated, timing
consuming and expensive.
In the early 1980s, a controversy broke out in the computer design community. Proponents of a new
type of computer design argued that no one was using so many instructions. As it was developed, it
came to be known as reduced instruction set computer (RISC). RISC concepts emerged by
statistical analysis of how software actually uses the resources of a processor. According to
experiments, many of the complex instructions were never used by programmers and compilers.
The huge costs of implementing numerous instructions made some designers think of streamlining
the instruction set.
„ Feature 1 Simple instructions
RISC processors have a small instruction set. For example, there are no such complex instructions
as block transfer, block search, bit scan and so forth.
Additionally, RISC uses the load/store architecture. In CISC processors, data can be manipulated
while it is still in memory. For example, “ADD A, (1000H)” contained in 16-bit CISC processor
TLCS-900/L1, is an instruction to bring the contents memory location 1000H into the CPU, sum it
up with data in register A and store the total in A. RISC did away with this kind of instructions. In
RISC, a single instruction can either load from memory into a register or store from a register into
memory. In other words, all operations are performed on operands held in CPU registers.
Since CISC processors have a large number of instructions, each with so many different addressing
modes, microcode is used to implement all of them. This feature of CISC makes the job of
programmers easy and helps to reduce code size. However, the implementation of microcode
requires more space on chip, creating a bottleneck in an effort to improve processor performance.
„ Feature 2 Fixed instruction size
RISC processors have a fixed instruction size. In a CISC microprocessor, instructions can be 1, 2 or
even 7 bytes at the maximum. This variable instruction size makes the task of the instruction
decoder very complicated since the size of the incoming instruction can never be known. In the
TX19A microprocessor, the instruction size is fixed at 32 bits. The fixed instruction size enables the
CPU to decode instructions quickly.
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