TX19A Datasheet, PDF (163/491 Pages) Toshiba Semiconductor – 32Bit TX System RISC

Appendix A 32-Bit ISA Details
ADDI rt, rs, immediate
Add Immediate
Operation
rt ⇐ rs + ((immediate15)¹⁶ || immediate15..0)
Instruction Encoding
31
26 25
21 20
16 15
0
ADDI
rs
rt
001000
immediate
6
5
5
16
Description
The 16-bit immediate is sign-extended and added to the contents of general-purpose register rs. The
result is placed into general-purpose register rt.
An Integer Overflow exception is taken on 2’s-complement overflow. The destination register (rt) is
not altered when an Integer Overflow exception occurs.
With the 16-bit signed immediate, the immediate range is -32768 to +32767. If a number is outside
this range, you need to put it in a general-purpose register and use the ADD or ADDU instruction
(see Section 3.3.2, 32-Bit Constants).
Exceptions
Integer Overflow exception
Example
Assume that register r2 contains 0x0200_F000. Then, executing the instruction:
ADDI r3,r2,0x1234
places the sum 0x0201_0234 into r3.
r2 ^{0 2 0 0 F 0 0 0}
+
00001234
Sign-Extended
r3 ^{0 2 0 1 0 2 3 4}
A-3