TC35273 Datasheet, PDF (23/23 Pages) Toshiba Semiconductor – MPEG-4 Audiovisual LSI

Preliminary
MPEG-4 Audiovisual Codec LSI
TC35273
Fig. 18 indicates the detail timing diagram of the network bitstream interface.
‚ƒ
T_SCKW
NWCLK
/NWOEN
/NWIEN
/NWINT
NWOFS
NWIFS
NWDI
NWDO
T_ENS
T_ENH
T_SDIS
T_SDIH
T_SDOD
Fig. 18 Detailed Network Bit Stream Interface.
Table 17 Network bit stream timing.
Parameter
T_SCKW
T_ENS
T_ENH
T_SDIS
T_SDIH
Description
Cycle time of NWCLK.
Duty ratio of NWCLK.
Setup time of /NOWEN,/NWIEN, /NWINT, NWOFS,
and NWIFS
Hold time of /NOWEN,/NWIEN, /NWINT, NWOFS,
and NWIFS
Setup time of NWDI
Hold time of NWDI
T_SDOD
Delay time from NWCLK to NWDO
is TSYSCLK the cycle time of the internal clock in TC35273.
Min
Max
1000
50+/-10
T_SYSCLK*3
T_SYSCLK*1
2
T_SYSCLK*3
T_SYSCLK*1
2
T_SYSCLK*12
Unit
ns
%
ns
ns
ns
ns
ns
4. Electric Specifications
4.1 TBD.
TOSHIBA Confidential
23/23
Version 0.90
2000-4-27