TC35273 Datasheet, PDF (16/23 Pages) Toshiba Semiconductor – MPEG-4 Audiovisual LSI

Preliminary
MPEG-4 Audiovisual Codec LSI
TC35273
T_CYCLE
CAMCLK
CAMVREF
CAMHREF
CAMPXL
T_SETUP
T_HOLD
Cb0
Y0
Cr0
Y1
Y n-1
Fig. 10 Camera Interface Timing Diagram
Table 13 Camera Interface Timing
Parameter
Description
T_CYCLE
T_SETUP
Clock cycle of CAMCLK (up to 27MHz)
Setup time of CAMVREF, CAMHREF, CAMPIXEL
T_HOLD
Hold time of CAMVREF, CAMHREF, CAMPIXL
Min
35
(T_SYSCLK*1)+
2
2
Max Unit
ns
ns
ns
TOSHIBA Confidential
16/23
Version 0.90
2000-4-27