TC55VEM316AXBN40 Datasheet, PDF (11/14 Pages) Toshiba Semiconductor – TENTATIVE TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS

TC55VEM316AXBN40,55
DATA RETENTION CHARACTERISTICS (Ta = −40° to 85°C)
SYMBOL
PARAMETER
MIN
V_DH
I_DDS2
t_CDR
t_R
Data Retention Supply Voltage
1.5
V_DH = 3.6 V Ta = −40~85°C

Standby Current
Ta = −40~40°C

V_DH = 3.0 V
Ta = −40~85°C

Chip Deselect to Data Retention Mode Time
0
Recovery Time
5
TYP






MAX
3.6
10
2
5


UNIT
V
µA
ns
ms
CE1 CONTROLLED DATA RETENTION MODE ^{(See Note 1)}
V_DD
V_DD
2.3 V
DATA RETENTION MODE
V_IH
CE1
(See Note 2)
t_CDR
V_DD − 0.2 V
GND
CE2 CONTROLLED DATA RETENTION MODE ^{(See Note 3)}
V_DD
V_DD
DATA RETENTION MODE
2.3 V
CE2
V_IH
t_CDR
V_IL
0.2 V
GND
UB , LB CONTROLLED DATA RETENTION MODE ^{(See Note 4)}
V_DD
V_DD
2.3 V
DATA RETENTION MODE
(See Note 2)
t_R
t_R
V_IH
UB , LB
GND
(See Note 5)
t_CDR
V_DD − 0.2 V
(See Note 5)
t_R
2002-07-23 11/14