TC55VEM208ASTN55 Datasheet, PDF (1/11 Pages) Toshiba Semiconductor – TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS

TC55VEM208ASTN40,55
TENTATIVE TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS
524,288-WORD BY 8-BIT STATIC RAM
DESCRIPTION
The TC55VEM208ASTN is a 4,194,304-bit static random access memory (SRAM) organized as 524,288 words by
8 bits. Fabricated using Toshiba's CMOS Silicon gate process technology, this device operates from a single 2.3 to
3.6 V power supply. Advanced circuit technology provides both high speed and low power at an operating current of
3 mA/MHz (typ) and a minimum cycle time of 40 ns. It is automatically placed in low-power mode at 0.7 µA standby
current (typ) when chip enable ( CE ) is asserted high. There are two control inputs. CE is used to select the device
and for data retention control, and output enable ( OE ) provides fast memory access. This device is well suited to
various microprocessor system applications where high speed, low power and battery backup are required. The
TC55VEM208ASTN is available in a plastic 32-pin thin-small-outline package (TSOP).
FEATURES
• Low-power dissipation
Operating: 9 mW/MHz (typical)
• Single power supply voltage of 2.3 to 3.6 V
• Power down features using CE
• Data retention supply voltage of 1.5 to 3.6 V
• Direct TTL compatibility for all inputs and outputs
• Wide operating temperature range of −40° to 85°C
• Standby Current (maximum):
3.6 V
3.0 V
10 µA
5 µA
• Access Times:
Access Time
CE Access Time
OE Access Time
• Package:
TSOPᶗ32-P-0.50
TC55VEM208ASTN
40
55
40 ns
55 ns
40 ns
55 ns
25 ns
30 ns
(Weight:0.22 g typ)
PIN ASSIGNMENT (TOP VIEW)
32 PIN TSOP
1
32
16
17
(Normal)
PIN NAMES
A0~A18
R/W
OE
CE
I/O1~I/O8
V_DD
GND
Address Inputs
Read/Write Control
Output Enable
Chip Enable
Data Inputs/Outputs
Power
Ground
Pin No.
Pin Name
Pin No.
Pin Name
12
A11 A9
17 18
A3 A2
3
4
5
6
7
8
9 10 11 12 13 14 15 16
A8 A13 R/W A17 A15 V_DD A18 A16 A14 A12 A7 A6 A5 A4
19 20 21 22 23 24 25 26 27 28 29 30 31 32
A1 A0 I/O1 I/O2 I/O3 GND I/O4 I/O5 I/O6 I/O7 I/O8 CE A10 OE
2002-08-07 1/11