MSP43020X3 Datasheet, PDF (9/92 Pages) Texas Instruments – MIXED SIGNAL MICROCONTROLLER

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MSP430F20x3
MSP430F20x2
MSP430F20x1
SLAS491H – AUGUST 2005 – REVISED AUGUST 2011
Table 3. Terminal Functions, MSP430F20x2
TERMINAL
NAME
NO.
I/O
PW, N RSA
P1.0/TACLK/ACLK/A0
2
1
I/O
P1.1/TA0/A1
P1.2/TA1/A2
3
2
I/O
4
3
I/O
P1.3/ADC10CLK/A3/
VREF-/VeREF-
5
4
I/O
P1.4/SMCLK/A4/VREF+/
VeREF+/TCK
6
5 I/O
P1.5/TA0/A5/SCLK/TMS
7
6
I/O
P1.6/TA1/A6/SDO/SCL/
TDI/TCLK
8
7
I/O
P1.7/A7/SDI/SDA/
TDO/TDI ⁽¹⁾
XIN/P2.6/TA1
XOUT/P2.7
RST/NMI/SBWTDIO
TEST/SBWTCK
V_CC
V_SS
DV_CC
AV_CC
DV_SS
AV_SS
QFN Pad
9
8
I/O
13
12
I/O
12
11
I/O
10
9
I
11
10
I
1
NA
14
NA
NA
16
NA
15
NA
14
NA
13
NA
Pad
NA
DESCRIPTION
General-purpose digital I/O pin
Timer_A, clock signal TACLK input
ACLK signal output
ADC10 analog input A0
General-purpose digital I/O pin
Timer_A, capture: CCI0A input, compare: Out0 output
ADC10 analog input A1
General-purpose digital I/O pin
Timer_A, capture: CCI1A input, compare: Out1 output
ADC10 analog input A2
General-purpose digital I/O pin
ADC10 conversion clock output
ADC10 analog input A3
Input for negative external reference voltage/negative internal reference voltage
output
General-purpose digital I/O pin
SMCLK signal output
ADC10 analog input A4
Input for positive external reference voltage/positive internal reference voltage
output
JTAG test clock, input terminal for device programming and test
General-purpose digital I/O pin
Timer_A, compare: Out0 output
ADC10 analog input A5
USI: external clock input in SPI or I2C mode; clock output in SPI mode
JTAG test mode select, input terminal for device programming and test
General-purpose digital I/O pin
Timer_A, capture: CCI1B input, compare: Out1 output
ADC10 analog input A6
USI: Data output in SPI mode; I2C clock in I2C mode
JTAG test data input or test clock input during programming and test
General-purpose digital I/O pin
ADC10 analog input A7
USI: Data input in SPI mode; I2C data in I2C mode
JTAG test data output terminal or test data input during programming and test
Input terminal of crystal oscillator
General-purpose digital I/O pin
Timer_A, compare: Out1 output
Output terminal of crystal oscillator
General-purpose digital I/O pin⁽²⁾
Reset or nonmaskable interrupt input
Spy-Bi-Wire test data input/output during programming and test
Selects test mode for JTAG pins on Port 1. The device protection fuse is
connected to TEST.
Spy-Bi-Wire test clock input during programming and test
Supply voltage
Ground reference
Digital supply voltage
Analog supply voltage
Digital ground reference
Analog ground reference
QFN package pad. Connection to VSS is recommended.
(1) TDO or TDI is selected via JTAG instruction.
(2) If XOUT/P2.7 is used as an input, excess current flows until P2SEL.7 is cleared. This is due to the oscillator output driver connection to
this pad after reset.
Copyright © 2005–2011, Texas Instruments Incorporated
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