MSP43020X3 Datasheet, PDF (8/92 Pages) Texas Instruments – MIXED SIGNAL MICROCONTROLLER

MSP430F20x3
MSP430F20x2
MSP430F20x1
SLAS491H – AUGUST 2005 – REVISED AUGUST 2011
www.ti.com
Table 2. Terminal Functions, MSP430F20x1
TERMINAL
NAME
NO.
I/O
PW, N RSA
DESCRIPTION
P1.0/TACLK/ACLK/CA0
General-purpose digital I/O pin
2
1
I/O
Timer_A, clock signal TACLK input
ACLK signal output
Comparator_A+, CA0 input
P1.1/TA0/CA1
General-purpose digital I/O pin
3
2
I/O Timer_A, capture: CCI0A input, compare: Out0 output
Comparator_A+, CA1 input
P1.2/TA1/CA2
General-purpose digital I/O pin
4
3
I/O Timer_A, capture: CCI1A input, compare: Out1 output
Comparator_A+, CA2 input
P1.3/CAOUT/CA3
5
4
I/O
General-purpose digital I/O pin
Comparator_A+, output / CA3 input
P1.4/SMCLK/C4/TCK
General-purpose digital I/O pin
6
5
I/O
SMCLK signal output
Comparator_A+, CA4 input
JTAG test clock, input terminal for device programming and test
P1.5/TA0/CA5/TMS
General-purpose digital I/O pin
7
6
I/O
Timer_A, compare: Out0 output
Comparator_A+, CA5 input
JTAG test mode select, input terminal for device programming and test
P1.6/TA1/CA6/TDI/TCLK
General-purpose digital I/O pin
8
7
I/O
Timer_A, compare: Out1 output
Comparator_A+, CA6 input
JTAG test data input or test clock input during programming and test
P1.7/CAOUT/CA7/TDO/TDI ⁽¹⁾
General-purpose digital I/O pin
9
8
I/O Comparator_A+, output / CA7 input
JTAG test data output terminal or test data input during programming and test
XIN/P2.6/TA1
Input terminal of crystal oscillator
13
12
I/O General-purpose digital I/O pin
Timer_A, compare: Out1 output
XOUT/P2.7
12
11
I/O
Output terminal of crystal oscillator
General-purpose digital I/O pin⁽²⁾
RST/NMI/SBWTDIO
10
9
I
Reset or nonmaskable interrupt input
Spy-Bi-Wire test data input/output during programming and test
TEST/SBWTCK
11
10
Selects test mode for JTAG pins on Port 1. The device protection fuse is
I connected to TEST.
Spy-Bi-Wire test clock input during programming and test
V_CC
1
16
Supply voltage
V_SS
14
14
Ground reference
NC
NA 13, 15
Not connected
QFN Pad
NA Pad NA QFN package pad. Connection to VSS is recommended.
(1) TDO or TDI is selected via JTAG instruction.
(2) If XOUT/P2.7 is used as an input, excess current flows until P2SEL.7 is cleared. This is due to the oscillator output driver connection to
this pad after reset.
8
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