MSP43020X3 Datasheet, PDF (10/92 Pages) Texas Instruments – MIXED SIGNAL MICROCONTROLLER

MSP430F20x3
MSP430F20x2
MSP430F20x1
SLAS491H – AUGUST 2005 – REVISED AUGUST 2011
www.ti.com
Table 4. Terminal Functions, MSP430F20x3
NAME
TERMINAL
NO.
PW, N RSA
P1.0/TACLK/ACLK/A0+
2
1
P1.1/TA0/A0-/A4+
3
2
P1.2/TA1/A1+/A4-
4
3
P1.3/VREF/A1-
5
4
P1.4/SMCLK/A2+/TCK
6
5
P1.5/TA0/A2-/SCLK/TMS
7
6
P1.6/TA1/A3+/SDO/SCL/
TDI/TCLK
8
7
P1.7/A3-/SDI/SDA/
TDO/TDI ⁽¹⁾
XIN/P2.6/TA1
XOUT/P2.7
RST/NMI/SBWTDIO
TEST/SBWTCK
V_CC
V_SS
DV_CC
AV_CC
DV_SS
AV_SS
QFN Pad
9
8
13
12
12
11
10
9
11
10
1
NA
14
NA
NA
16
NA
15
NA
14
NA
13
NA
Pad
DESCRIPTION
I/O
General-purpose digital I/O pin
I/O
Timer_A, clock signal TACLK input
ACLK signal output
SD16_A positive analog input A0
General-purpose digital I/O pin
I/O
Timer_A, capture: CCI0A input, compare: Out0 output
SD16_A negative analog input A0
SD16_A positive analog input A4
General-purpose digital I/O pin
I/O
Timer_A, capture: CCI1A input, compare: Out1 output
SD16_A positive analog input A1
SD16_A negative analog input A4
General-purpose digital I/O pin
I/O
Input for an external reference voltage/internal reference voltage output (can be
used as mid-voltage)
SD16_A negative analog input A1
General-purpose digital I/O pin
I/O
SMCLK signal output
SD16_A positive analog input A2
JTAG test clock, input terminal for device programming and test
General-purpose digital I/O pin
Timer_A, compare: Out0 output
I/O SD16_A negative analog input A2
USI: external clock input in SPI or I2C mode; clock output in SPI mode
JTAG test mode select, input terminal for device programming and test
General-purpose digital I/O pin
Timer_A, capture: CCI1B input, compare: Out1 output
I/O SD16_A positive analog input A3
USI: Data output in SPI mode; I2C clock in I2C mode
JTAG test data input or test clock input during programming and test
General-purpose digital I/O pin
I/O
SD16_A negative analog input A3
USI: Data input in SPI mode; I2C data in I2C mode
JTAG test data output terminal or test data input during programming and test
Input terminal of crystal oscillator
I/O General-purpose digital I/O pin
Timer_A, compare: Out1 output
I/O
Output terminal of crystal oscillator
General-purpose digital I/O pin⁽²⁾
I
Reset or nonmaskable interrupt input
Spy-Bi-Wire test data input/output during programming and test
Selects test mode for JTAG pins on Port 1. The device protection fuse is
I connected to TEST.
Spy-Bi-Wire test clock input during programming and test
Supply voltage
Ground reference
Digital supply voltage
Analog supply voltage
Digital ground reference
Analog ground reference
NA QFN package pad. Connection to VSS is recommended.
(1) TDO or TDI is selected via JTAG instruction.
(2) If XOUT/P2.7 is used as an input, excess current flows until P2SEL.7 is cleared. This is due to the oscillator output driver connection to
this pad after reset.
10
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