AM1806_16 Datasheet, PDF (85/245 Pages) Texas Instruments – AM1806 ARM® Microprocessor

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AM1806
SPRS658F – FEBRUARY 2010 – REVISED MARCH 2014
Table 6-10. PSC1 Default Module Configuration
LPSC Module Name
Number
0
EDMA3 Channel Controller 1
1
USB0 (USB2.0)
2
—
3
GPIO
4
UHPI
5
—
6
DDR2 (and SCR_F3)
7
McASP0 ( + McASP0 FIFO)
8
—
9
VPIF
10 SPI 1
11 I2C 1
12 UART 1
13 UART 2
14 McBSP0 ( + McBSP0 FIFO)
15 McBSP1 ( + McBSP1 FIFO)
16 LCDC
17 eHRPWM0/1
18 MMCSD1
19 uPP
20 ECAP0/1/2
21 EDMA3 Transfer Controller 2
22-23 —
24 SCR_F0 (and bridge F0)
25 SCR_F1 (and bridge F1)
26 SCR_F2 (and bridge F2)
27 SCR_F6 (and bridge F3)
28 SCR_F7 (and bridge F4)
29 SCR_F8 (and bridge F5)
30 Bridge F7 (DDR Controller
path)
31 On-chip RAM (including
SCR_F4 and bridge F6)
Power Domain
AlwaysON (PD0)
AlwaysON (PD0)
—
AlwaysON (PD0)
AlwaysON (PD0)
—
AlwaysON (PD0)
AlwaysON (PD0)
—
AlwaysON (PD0)
AlwaysON (PD0)
AlwaysON (PD0)
AlwaysON (PD0)
AlwaysON (PD0)
AlwaysON (PD0)
AlwaysON (PD0)
AlwaysON (PD0)
AlwaysON (PD0)
AlwaysON (PD0)
AlwaysON (PD0)
AlwaysON (PD0)
AlwaysON (PD0)
—
AlwaysON (PD0)
AlwaysON (PD0)
AlwaysON (PD0)
AlwaysON (PD0)
AlwaysON (PD0)
AlwaysON (PD0)
AlwaysON (PD0)
PD_SHRAM
Default Module State
SwRstDisable
SwRstDisable
—
SwRstDisable
SwRstDisable
—
SwRstDisable
SwRstDisable
—
SwRstDisable
SwRstDisable
SwRstDisable
SwRstDisable
SwRstDisable
SwRstDisable
SwRstDisable
SwRstDisable
SwRstDisable
SwRstDisable
SwRstDisable
SwRstDisable
SwRstDisable
—
Enable
Enable
Enable
Enable
Enable
Enable
Enable
Enable
Auto Sleep/Wake Only
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Yes
Yes
Yes
Yes
Yes
Yes
Yes
—
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Peripheral Information and Electrical Specifications
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