AM1806_16 Datasheet, PDF (174/245 Pages) Texas Instruments – AM1806 ARM® Microprocessor

AM1806
SPRS658F – FEBRUARY 2010 – REVISED MARCH 2014
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6.19.2 USB0 [USB2.0] Electrical Data/Timing
The USB PHY PLL can support input clock of the following frequencies: 12.0 MHz, 13.0 MHz, 19.2 MHz,
20.0 MHz, 24.0 MHz, 26.0 MHz, 38.4 MHz, 40.0 MHz or 48.0 MHz. USB_REFCLKIN jitter tolerance is 50
ppm maximum.
Table 6-84. Switching Characteristics Over Recommended Operating Conditions for USB0 [USB2.0] (see
Figure 6-43)
1.3V, 1.2V, 1.1V, 1.0V
NO.
PARAMETER
LOW SPEED
1.5 Mbps
FULL SPEED
12 Mbps
HIGH SPEED
480 Mbps
UNIT
1 t_r(D)
2 t_f(D)
3 t_rfM
4 V_CRS
5 t_jr(source)NT
t_jr(FUNC)NT
6 t_jr(source)PT
t_jr(FUNC)PT
7 t_w(EOPT)
8 t_w(EOPR)
9 t_(DRATE)
10 Z_DRV
11 Z_INP
Rise time, USB_DP and USB_DM signals⁽¹⁾
Fall time, USB_DP and USB_DM signals⁽¹⁾
Rise/Fall time, matching⁽²⁾
Output signal cross-over voltage⁽¹⁾
Source (Host) Driver jitter, next transition
Function Driver jitter, next transition
Source (Host) Driver jitter, paired transition⁽⁴⁾
Function Driver jitter, paired transition
Pulse duration, EOP transmitter
Pulse duration, EOP receiver
Data Rate
Driver Output Resistance
Receiver Input Impedance
MIN
75
75
80
1.3
1250
670
–
100k
MAX
300
300
120
2
2
25
1
10
1500
1.5
–
MIN
4
4
90
1.3
160
82
40.5
100k
MAX
20
20
111
2
2
2
1
1
175
12
49.5
MIN
0.5
0.5
–
–
–
–
40.5
-
MAX
ns
ns
–%
–V
(3)_ns
(3) _ns
(3) _ns
(3) _ns
– ns
ns
480 Mb/s
49.5 Ω
-Ω
(1) Low Speed: C_L = 200 pF, Full Speed: C_L = 50 pF, High Speed: C_L = 50 pF
(2) t_RFM = (t_r/t_f) x 100. [Excluding the first transaction from the Idle state.]
(3) For more detailed information, see the Universal Serial Bus Specification Revision 2.0, Chapter 7. Electrical.
(4) t_jr = t_px(1) - t_px(0)
USB_DM
V_CRS
USB_DP
10% V_OL
t_{per −} t_jr
90% V_OH
t_r
t_f
Figure 6-43. USB2.0 Integrated Transceiver Interface Timing
174 Peripheral Information and Electrical Specifications
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