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AM1806_16 Datasheet, PDF (63/245 Pages) Texas Instruments – AM1806 ARM® Microprocessor
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AM1806
SPRS658F – FEBRUARY 2010 – REVISED MARCH 2014
5.5 Electrical Characteristics Over Recommended Ranges of Supply Voltage and
Operating Junction Temperature (Unless Otherwise Noted)
VOH
VOL
II (2)
IOH
IOL
Capacitance
PARAMETER
TEST CONDITIONS
High-level output voltage
(dual-voltage LVCMOS IOs at 3.3V)(1)
High-level output voltage
(dual-voltage LVCMOS IOs at 1.8V)(1)
DVDD= 3.15V, IOH = -4 mA
DVDD= 3.15V, IOH = -100 μA
DVDD= 1.71V, IOH = -2 mA
Low-level output voltage
(dual-voltage LVCMOS I/Os at 3.3V)
Low-level output voltage
(dual-voltage LVCMOS I/Os at 1.8V)
DVDD= 3.15V, IOL = 4mA
DVDD= 3.15V, IOL = 100 μA
DVDD= 1.71V, IOL = 2mA
VI = VSS to DVDD without opposing
internal resistor
Input current(1)
(dual-voltage LVCMOS I/Os)
VI = VSS to DVDD with opposing
internal pullup resistor (3)
VI = VSS to DVDD with opposing
internal pulldown resistor (3)
Input current (DDR2/mDDR I/Os)
High-level output current(1)
(dual-voltage LVCMOS I/Os)
VI = VSS to DVDD with opposing
internal pulldown resistor (3)
Low-level output current(1)
(dual-voltage LVCMOS I/Os)
Input capacitance (dual-voltage
LVCMOS)
Output capacitance (dual-voltage
LVCMOS)
MIN
TYP
2.4
2.95
DVDD-0.45
70
-75
-77
3
3
MAX
0.4
0.2
0.45
±9
310
-270
-286
-6
6
UNIT
V
V
V
V
V
V
μA
μA
μA
μA
mA
mA
pF
pF
(1) These IO specifications apply to the dual-voltage IOs only and do not apply to the DDR2/mDDR interface. DDR2/mDDR IOs are 1.8V
IOs and adhere to the JESD79-2A standard. USB0 I/Os adhere to the USB2.0 standard.
(2) II applies to input-only pins and bi-directional pins. For input-only pins, II indicates the input leakage current. For bi-directional pins, II
indicates the input leakage current and off-state (Hi-Z) output leakage current.
(3) Applies only to pins with an internal pullup (IPU) or pulldown (IPD) resistor. The pull-up and pull-down strengths shown represent the
minimum and maximum strength across process variation.
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