AM1808_14 Datasheet, PDF (84/265 Pages) Texas Instruments – Microprocessor

AM1808
SPRS653E – FEBRUARY 2010 – REVISED MARCH 2014
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System Interrupt
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Table 6-6. AINTC System Interrupt Assignments (continued)
Interrupt Name
uPP_ALLINT
VPIF_ALLINT
EDMA3_1_CC0_INT0
EDMA3_1_CC0_ERRINT
EDMA3_1_TC0_ERRINT
T64P3_ALL
MCBSP0_RINT
MCBSP0_XINT
MCBSP1_RINT
MCBSP1_XINT
Source
uPP Combined Interrupt
• Channel I End-of-Line Interrupt
• Channel I End-of-Window Interrupt
• Channel I DMA Access Interrupt
• Channel I Overflow-Underrun Interrupt
• Channel I DMA Programming Error Interrupt
• Channel Q End-of-Line Interrupt
• Channel Q End-of-Window Interrupt
• Channel Q DMA Access Interrupt
• Channel Q Overflow-Underrun Interrupt
• Channel Q DMA Programming Error Interrupt
VPIF Combined Interrupt
• Channel 0 Frame Interrupt
• Channel 1 Frame Interrupt
• Channel 2 Frame Interrupt
• Channel 3 Frame Interrupt
• Error Interrupt
EDMA3_1 Channel Controller 0 Shadow Region 0 Transfer
Completion Interrupt
EDMA3_1Channel Controller 0 Error Interrupt
EDMA3_1 Transfer Controller 0 Error Interrupt
Timer64P 3 - Combined TINT12 and TINT34
McBSP0 Receive Interrupt
McBSP0 Transmit Interrupt
McBSP1 Receive Interrupt
McBSP1 Transmit Interrupt
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Peripheral Information and Electrical Specifications
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