AM1808_14 Datasheet, PDF (250/265 Pages) Texas Instruments – Microprocessor

AM1808
SPRS653E – FEBRUARY 2010 – REVISED MARCH 2014
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PIN
EMU0
EMU1
TYPE
I/O
I/O
Table 6-143. JTAG Port Description (continued)
NAME
Emulation 0
Emulation 1
Channel 0 trigger + HSRTDX
Channel 1 trigger + HSRTDX
DESCRIPTION
6.34.2 Scan Chain Configuration Parameters
Table 6-144 shows the TAP configuration details required to configure the router/emulator for this device.
Router Port ID
17
18
19
Default TAP
No
No
No
Table 6-144. JTAG Port Description
TAP Name
Reserved
ARM926
ETB
Tap IR Length
38
4
4
The router is revision C and has a 6-bit IR length.
6.34.3 Initial Scan Chain Configuration
The first level of debug interface that sees the scan controller is the TAP router module. The debugger
can configure the TAP router for serially linking up to 16 TAP controllers or individually scanning one of
the TAP controllers without disrupting the IR state of the other TAPs.
6.34.3.1 Adding TAPS to the Scan Chain
The TAP router must be programmed to add additional TAPs to the scan chain. The following JTAG scans
must be completed to add the ARM926EJ-S to the scan chain.
A Power-On Reset (POR) or the JTAG Test-Logic Reset state configures the TAP router to contain only
the router’s TAP.
TDO
TDI
CLK
TMS
Router
Steps
Router
ARM926EJ-S/ETM
Figure 6-86. Adding ARM926EJ-S to the scan chain
Pre-amble: The device whose data reaches the emulator first is listed first in the board configuration file.
This device is a pre-amble for all the other devices. This device has the lowest device ID.
Post-amble: The device whose data reaches the emulator last is listed last in the board configuration file.
This device is a post-amble for all the other devices. This device has the highest device ID.
250 Peripheral Information and Electrical Specifications
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