AM1808_14 Datasheet, PDF (4/265 Pages) Texas Instruments – Microprocessor

AM1808
SPRS653E – FEBRUARY 2010 – REVISED MARCH 2014
www.ti.com
1.4 Functional Block Diagram
Figure 1-1 shows the functional block diagram of the device.
Input
Clock(s)
System Control
PLL/Clock
Generator
w/OSC
General-
Purpose
Timer (x3)
RTC/
32-kHz
OSC
JTAG Interface
Memory
Protection
Power/Sleep
Controller
Pin
Multiplexing
ARM Subsystem
ARM926EJ-S CPU
With MMU
4KB ETB
16KB 16KB
I-Cache D-Cache
8KB RAM
(Vector Table)
64KB ROM
Switched Central Resource (SCR)
Peripherals
DMA Audio Ports
Serial Interfaces
Display
Video Parallel Port Internal Memory Customizable Interface
EDMA3
(x2)
McASP
McBSP
I²C
w/FIFO
(x2)
(x2)
SPI
UART
(x2)
(x3)
LCD
Ctlr
VPIF
uPP
128KB
RAM
PRU Subsystem
Control Timers
Connectivity
External Memory Interfaces
ePWM eCAP
(x2) (x3)
USB2.0 USB1.1 EMAC
OTG Ctlr OHCI Ctlr 10/100 MDIO
PHY
PHY (MII/RMII)
MMC/SD
HPI
(8b)
SATA
(x2)
EMIFA(8b/16B)
NAND/Flash
16b SDRAM
DDR2/MDDR
Controller
(1) Note: Not all peripherals are available at the same time due to multiplexing.
Figure 1-1. Functional Block Diagram
4
AM1808 ARM Microprocessor
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