AM1808_14 Datasheet, PDF (39/265 Pages) Texas Instruments – Microprocessor

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AM1808
SPRS653E – FEBRUARY 2010 – REVISED MARCH 2014
3.7.17 Universal Serial Bus Modules (USB0, USB1)
Table 3-19. Universal Serial Bus (USB) Terminal Functions
SIGNAL
NAME
TYPE ⁽¹⁾
NO.
PULL ⁽²⁾
POWER
GROUP ⁽³⁾
DESCRIPTION
USB0 2.0 OTG (USB0)
USB0_DM
M18
A
IPD
—
USB0 PHY data minus
USB0_DP
M19
A
IPD
—
USB0 PHY data plus
USB0_VDDA33
N18 PWR
—
—
USB0 PHY 3.3-V supply
USB0_ID
P16
A
—
—
USB0 PHY identification
(mini-A or mini-B plug)
USB0_VBUS
N19
A
—
—
USB0 bus voltage
USB0_DRVVBUS
K18
O
IPD
B
USB0 controller VBUS control output.
AHCLKX / USB_REFCLKIN / UART1_CTS /
GP0[10] / PRU0_R31[17]
A3
I
CP[0]
A
USB_REFCLKIN. Optional clock input
USB0_VDDA18
N14 PWR
—
—
USB0 PHY 1.8-V supply input
USB0_VDDA12
N17
A
—
USB0 PHY 1.2-V LDO output for bypass cap
For proper device operation, this pin must
—
always be connected via a 0.22-μF capacitor
to VSS (GND), even if USB0 is not being
used.
USB_CVDD
M12 PWR
—
—
USB0 and USB1 core logic 1.2-V supply
input
USB1 1.1 OHCI (USB1)
USB1_DM
P18
A
—
—
USB1 PHY data minus
USB1_DP
P19
A
—
—
USB1 PHY data plus
AHCLKX / USB_REFCLKIN / UART1_CTS /
GP0[10] / PRU0_R31[17]
A3
I
CP[0]
A
USB_REFCLKIN. Optional clock input
USB1_VDDA33
P15 PWR
—
—
USB1 PHY 3.3-V supply
USB1_VDDA18
P14 PWR
—
—
USB1 PHY 1.8-V supply
USB_CVDD
M12 PWR
—
—
USB0 and USB1 core logic 1.2-V supply
input
(1) I = Input, O = Output, I/O = Bidirectional, Z = High impedance, PWR = Supply voltage, GND = Ground, A = Analog signal.
Note: The pin type shown refers to the input, output or high-impedance state of the pin function when configured as the signal name
highlighted in bold. All multiplexed signals may enter a high-impedance state when the configured function is input-only or the configured
function supports high-Z operation. All GPIO signals can be used as input or output. For multiplexed pins where functions have different
types (ie., input versus output), the table reflects the pin function direction for that particular peripheral.
(2) IPD = Internal Pulldown resistor; IPU = Internal Pullup resistor; CP[n] = configurable pull-up/pull-down (where n is the pin group) using
the PUPDENA and PUPDSEL registers in the System Module. The pull-up and pull-down control of these pins is not active until the
device is out of reset. During reset, all of the pins associated with these registers are pulled down. If the application requires a pull-up,
an external pull-up can be used. For more detailed information on pullup/pulldown resistors and situations where external
pullup/pulldown resistors are required, see the Device Configuration section. For electrical specifications on pullup and internal pulldown
circuits, see the Device Operating Conditions section.
(3) This signal is part of a dual-voltage IO group (A, B or C). These groups can be operated at 3.3V or 1.8V nominal. The three groups can
be operated at independent voltages but all pins withina group will operate at the same voltage. Group A operates at the voltage of
power supply DVDD3318_A. Group B operates at the voltage of power supply DVDD3318_B. Group C operates at the voltage of power
supply DVDD3318_C.
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