MSP430F5310 Datasheet, PDF (80/106 Pages) Texas Instruments – MSP430F5310 and MSP430F530x Mixed-Signal Microcontrollers

MSP430F5310, MSP430F5309
MSP430F5308, MSP430F5304
SLAS677E – SEPTEMBER 2010 – REVISED NOVEMBER 2013
Port P5, P5.3, Input/Output With Schmitt Trigger
To XT2
www.ti.com
Pad Logic
P5REN.3
P5DIR.3
0
1
P5OUT.3
Module X OUT
P5SEL.3
P5IN.3
Module X IN
0
1
EN
D
DV_SS
0
DV_CC
1
1
P5DS.3
0: Low drive
1: High drive
Bus
Keeper
P5.3/XT2OUT
PIN NAME (P5.x)
P5.2/XT2IN
P5.3/XT2OUT
Table 50. Port P5 (P5.2, P5.3) Pin Functions
x
FUNCTION
P5DIR.x
CONTROL BITS AND SIGNALS⁽¹⁾
P5SEL.2
P5SEL.3
XT2BYPASS
2 P5.2 (I/O)
I: 0; O: 1
0
X
X
XT2IN crystal mode⁽²⁾
X
1
X
0
XT2IN bypass mode⁽²⁾
X
1
X
1
3 P5.3 (I/O)
I: 0; O: 1
0
X
X
XT2OUT crystal mode⁽³⁾
X
1
X
0
P5.3 (I/O)⁽³⁾
X
1
X
1
(1) X = Don't care
(2) Setting P5SEL.2 causes the general-purpose I/O to be disabled. Pending the setting of XT2BYPASS, P5.2 is configured for crystal
mode or bypass mode.
(3) Setting P5SEL.2 causes the general-purpose I/O to be disabled in crystal mode. When using bypass mode, P5.3 can be used as
general-purpose I/O.
80
Submit Documentation Feedback
Copyright © 2010–2013, Texas Instruments Incorporated
Product Folder Links: MSP430F5310 MSP430F5309 MSP430F5308 MSP430F5304