MSP430F5310 Datasheet, PDF (78/106 Pages) Texas Instruments – MSP430F5310 and MSP430F530x Mixed-Signal Microcontrollers

MSP430F5310, MSP430F5309
MSP430F5308, MSP430F5304
SLAS677E – SEPTEMBER 2010 – REVISED NOVEMBER 2013
Port P5, P5.0 and P5.1, Input/Output With Schmitt Trigger
to/from Reference
to ADC10
INCHx = x
P5REN.x
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Pad Logic
P5DIR.x
0
1
DV_SS
0
DV_CC
1
1
P5OUT.x
From module
P5SEL.x
P5IN.x
To module
0
1
EN
D
P5DS.x
0: Low drive
1: High drive
Bus
Keeper
P5.0/(A8/VeREF+)
P5.1/(A9/VeREF–)
PIN NAME (P5.x)
P5.0/A8/VeREF+ ⁽²⁾
P5.1/A9/VeREF– ⁽⁵⁾
Table 49. Port P5 (P5.0 and P5.1) Pin Functions
x
0 P5.0 (I/O)⁽³⁾
A8/VeREF+ ⁽⁴⁾
1 P5.1 (I/O)⁽³⁾
A9/VeREF– ⁽⁶⁾
FUNCTION
CONTROL BITS AND SIGNALS⁽¹⁾
P5DIR.x
P5SEL.x
I: 0; O: 1
0
X
1
I: 0; O: 1
0
X
1
(1) X = Don't care
(2) VeREF+ available on devices with ADC10_A.
(3) Default condition
(4) Setting the P5SEL.0 bit disables the output driver and the input Schmitt trigger to prevent parasitic cross currents when applying analog
signals. An external voltage can be applied to VeREF+ and used as the reference for the ADC10_A when available.
(5) VeREF- available on devices with ADC10_A.
(6) Setting the P5SEL.1 bit disables the output driver and the input Schmitt trigger to prevent parasitic cross currents when applying analog
signals. An external voltage can be applied to VeREF- and used as the reference for the ADC10_A when available.
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