MSP430F5310 Datasheet, PDF (2/106 Pages) Texas Instruments – MSP430F5310 and MSP430F530x Mixed-Signal Microcontrollers

MSP430F5310, MSP430F5309
MSP430F5308, MSP430F5304
SLAS677E – SEPTEMBER 2010 – REVISED NOVEMBER 2013
APPLICATIONS
• Analog and Digital Sensor Systems
• Digital Motor Control
• Remote Controls
• Thermostats
• Digital Timers
• Hand-Held Meters
www.ti.com
DESCRIPTION
The Texas Instruments MSP430™ family of ultra-low-power microcontrollers consists of several devices featuring
different sets of peripherals targeted for various applications. The architecture, combined with five low-power
modes, is optimized to achieve extended battery life in portable measurement applications. The device features a
powerful 16-bit RISC CPU, 16-bit registers, and constant generators that contribute to maximum code efficiency.
The digitally controlled oscillator (DCO) allows the device to wake up from low-power modes to active mode in
less than 5 µs.
The MSP430F5310, MSP430F5309, and MSP430F5308 devices are microcontroller configurations with a 3.3-V
LDO, four 16-bit timers, a high-performance 10-bit analog-to-digital converter (ADC), two universal serial
communication interfaces (USCIs), a hardware multiplier, DMA, a real-time clock (RTC) module with alarm
capabilities, and 31 or 47 I/O pins.
The MSP430F5304 device is a configuration with a 3.3-V LDO, four 16-bit timers, a high-performance 10-bit
ADC, two USCIs, a hardware multiplier, DMA, an RTC module with alarm capabilities, and 31 I/O pins.
Typical applications for this device include analog and digital sensor systems, digital motor control, remote
controls, thermostats, digital timers, and hand-held meters.
Table 1. Family Members⁽¹⁾⁽²⁾
DEVICE
MSP430F5310
PROGRAM
MEMORY
(KB)
SRAM
(KB)
32
6
Timer_A ⁽³⁾
Timer_B ⁽⁴⁾
USCI
CHANNEL A: CHANNEL B:
UART, LIN,
SPI, I²C
IrDA, SPI
ADC10_A
(CH)
2
5, 3, 3
7
1
2
10 ext, 2 int
1
6 ext, 2 int
Comp_B
(CH)
8
4
2
MSP430F5309
24
6
5, 3, 3
7
1
2
10 ext, 2 int
8
1
6 ext, 2 int
4
2
MSP430F5308
16
6
5, 3, 3
7
1
2
10 ext, 2 int
8
1
6 ext, 2 int
4
MSP430F5304
8
6
5, 3, 3
7
1
1
6 ext, 2 int
-
I/O
PACKAGE
TYPE
47
64 RGC,
80 ZQE
31
48 PT,
48 RGZ
47
64 RGC,
80 ZQE
31
48 PT,
48 RGZ,
47
64 RGC,
80 ZQE
31
48 PT,
48 RGZ,
31
48 PT,
48 RGZ
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
(2) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/packaging.
(3) Each number in the sequence represents an instantiation of Timer_A with its associated number of capture compare registers and PWM
output generators available. For example, a number sequence of 3, 5 would represent two instantiations of Timer_A, the first
instantiation having 3 and the second instantiation having 5 capture compare registers and PWM output generators, respectively.
(4) Each number in the sequence represents an instantiation of Timer_B with its associated number of capture compare registers and PWM
output generators available. For example, a number sequence of 3, 5 would represent two instantiations of Timer_B, the first
instantiation having 3 and the second instantiation having 5 capture compare registers and PWM output generators, respectively.
2
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