CD4051B-Q1_15 Datasheet, PDF (8/24 Pages) Texas Instruments – CMOS ANALOG MULTIPLEXERS/DEMULTIPLEXERS

CD4051B-Q1, CD4052B-Q1, CD4053B-Q1
CMOS ANALOG MULTIPLEXERS/DEMULTIPLEXERS
WITH LOGIC−LEVEL CONVERSION
SCHS354A − AUGUST 2004 − REVISED JANUARY 2008
electrical specifications
PARAMETER
TEST CONDITIONS
LIMITS AT
INDICATED
V_IS V_DD TEMPERATURES
(V)
(V)
25°C
UNIT
MIN TYP MAX
−3-dB cutoff
frequency,
channel ON
(sine-wave input)
Total harmonic
THD _distortion
R_L = 1 kΩ,
V_OS at COM OUT/IN,
See Note 2,
V_OS at COM OUT/IN
V_EE = V_SS, 20log V_OS/V_IS = −3 dB,
V_OS at any channel
R_L = 10 kΩ,
See Note 2
CD4053 5
10
CD4052 5
10
CD4051 5
10
2
5
3
10
5
15
30
25
20
MHz
60
0.3
0.2
%
0.12
V_EE = V_SS, f_is = 1-kHz sine wave
−40-dB
feedthrough
frequency
(all channels OFF)
R_L = 1 kΩ,
V_OS at COM OUT/IN,
See Note 2
V_EE = V_SS, 20log V_OS/V_IS = −40 dB,
V_OS at any channel
CD4053 5
10
CD4052 5
10
CD4051 5
10
R_L = 1 kΩ, between any two channels, See Note 2
5
10
V_EE = V_SS, 20log V_OS/V_IS = −40 dB,
Between sections, Measured on common
0.12
8
10
12
MHz
8
3
6
−40-dB signal
crosstalk frequency
V_EE = V_SS, 20log V_OS/V_IS = −40 dB,
Between sections,
Measured on any channel
V_EE = V_SS, 20log V_OS/V_IS = −40 dB,
Between any two sections,
In pin 2, Out pin 14
V_EE = V_SS, 20log V_OS/V_IS = −40 dB,
Between any two sections,
In pin 15, Out pin 14
CD4052
CD4053
10
MHz
2.5
6
Address or inhibit
to signal crosstalk
R_L = 10 kΩ, See Note 4
V_EE = 0 V, V_SS = 0 V, t_r, t_f = 20 ns,
V_CC = V_DD − V_SS (square wave)
10
65
65
mV_PEAK
NOTES: 2. Peak-to-peak voltage symmetrical about V_DD − V_EE
2
4. Both ends of channel
8
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