CD4051B-Q1_15 Datasheet, PDF (4/24 Pages) Texas Instruments – CMOS ANALOG MULTIPLEXERS/DEMULTIPLEXERS

CD4051B-Q1, CD4052B-Q1, CD4053B-Q1
CMOS ANALOG MULTIPLEXERS/DEMULTIPLEXERS
WITH LOGIC−LEVEL CONVERSION
SCHS354A − AUGUST 2004 − REVISED JANUARY 2008
logic diagram (positive logic)
CD4051B
CHANNEL I/O
16 V_DD
76543210
4 2 5 1 12 15 14 13
TG
TG
A^† 11
TG
B^† 10
Binary
TG
to
Logic-Level
Conversion
1-of-8
Decoder
TG
C^† 9
With
Inhibit
TG
TG
INH^† 6
TG
3
COM
OUT/IN
8 V_SS
7 V_EE
† _{All inputs are protected by CMOS protection network.}
CD4052B
16 V_DD
A^{† 10}
B^{† 9}
INH^{† 6}
Logic-Level
Conversion
Binary
to
1-of-4
Decoder
With
Inhibit
8 V_SS
7 V_EE
† _{All inputs are protected by CMOS protection network.}
X CHANNEL I/O
3210
11 15 14 12
TG
TG
TG
TG
TG
TG
TG
TG
1524
0123
Y CHANNEL I/O
13
COM X
OUT/IN
3
COM Y
OUT/IN
4
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