TMS320DM8148_1109 Datasheet, PDF (7/360 Pages) Texas Instruments – TMS320DM814x DaVinci Digital Media Processors

TMS320DM8148, TMS320DM8147, TMS320DM8146
www.ti.com
SPRS647B – MARCH 2011 – REVISED SEPTEMBER 2011
Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
This data manual revision history highlights the technical changes made to the SPRS647A device-specific
data manual to make it an SPRS647B revision.
Scope: Applicable updates to the DM814x DaVinci™ DMP device family, specifically relating to the
TMS320DM8147/8 devices (all Silicon Revisions 2.1) which is now in the product preview (PP) stage of
development have been incorporated.
• Exposed DSP L3 Master/Slave, L4 Peripheral Connectivity, and L4 Fast/Slow Peripheral Memory
Maps for McASPx, McBSP, UARTx, I2Cx, SPIx, EDMA, GPIO/INT, DDRx, GPMC, EMAC, PCIe,
Timers, and USBx
• Deleted CYE-01 mechanical package (thicker flat lid version); only the thinner top hat version now
supported
• Updated/Changed the VOUT[x]_CLK signal to be negative-edge clocking [FAE ALERT]
• Updated/Changed "TBD" values in some Peripheral Electrical Data/Timing Sections
• Updated/Changed Technical Reference Manual (TRM) document title references and referenced
specific chapters.
• Deleted Case temperature ranges in Section 6, Device Operating Conditions.
SEE
Global
Section 1.1
Features
ADDITIONS/MODIFICATIONS/DELETIONS
• Updated/Changed "HDVICP" to "HDVICP2", where applicable.
HD Video Processing Subsystem (HDVPSS) bullet:
• Added "With Integrated PHY" to the "Digital HDMI 1.3 transmitter" sub-bullet
Updated/Changed the "Ethernet Switch With Dual 10/100/1000 Mb/s External I/Fs (EMAC SW) bullet
to "Dual Port Ethernet (10/100/1000 Mb/s) With Optional Switch"
Section 1.4
Figure 1-1, TMS320DM814x DaVinci™ Digital Media Processors Functional Block Diagram:
Functional Block Diagram _{• Added associated peripherals supported device-specific footnotes}
Section 2.12.1
L3 Memory Map
Section 2.12.1, L3 Memory Map:
• Added the "Table 2-3 also shows the C674x DSP which ..." sentence to the paragraph
Section 2.12.3.1
L4 Fast Peripheral
Memory Map
Section 2.12.3.1, L4 Fast Peripheral Memory Map:
• Deleted the START/END HEX ADDRESS ranges of the "C647x DSP" column for locations not
accessible by the C647x DSP
Exposed DSP access for McASPx, McBSP, UARTx, I2Cx, SPIx, EDMA, GPIO/INT, DDRx, GPMC,
EMAC, PCIe, Timers, and USBx only
Section 2.12.3.2
L4 Slow Peripheral
Memory Map
Table 2-6, L4 Slow Peripheral Memory Map:
• Deleted the START/END HEX ADDRESS ranges of the "C647x DSP" column for locations not
accessible by the C647x DSP
Exposed DSP access for McASP, McBSP, UART, I2C, SPI, EDMA, GPIO/INT, GPMC, EMAC,
PCIe, Timers, and USB only
Section 3.2.14
Reset, Interrupts, and
JTAG Interface
Section 3.2.17
SPI
Table 3-25, RESET, Interrupts, and JTAG Terminal Functions:
• Updated/Changed the EMU2 (AG7), EMU3 (AH7), EMU4 (AD9) de-selected input state from
"DSIS: 1" to "DSIS: PIN"
Table 3-30, SPI 0 Terminal Functions
• Updated/Changed the SPI[0]_SCS[1] (AE5), SPI[0]_SCS[2] (AG4), SPI[0]_SCS[3] (AH4)
de-selected input state from "DSIS: 1" to "DSIS: PIN"
Copyright © 2011, Texas Instruments Incorporated
Submit Documentation Feedback
Product Folder Link(s): TMS320DM8148 TMS320DM8147 TMS320DM8146
Contents
7