TMS320DM8148_1109 Datasheet, PDF (125/360 Pages) Texas Instruments – TMS320DM814x DaVinci Digital Media Processors

TMS320DM8148, TMS320DM8147, TMS320DM8146
www.ti.com
SPRS647B – MARCH 2011 – REVISED SEPTEMBER 2011
Table 3-39. UART3 Terminal Functions
SIGNAL
NAME
NO.
TYPE ⁽¹⁾
OTHER ⁽²⁾
(3)
MUXED
DESCRIPTION
UART3
VOUT[1]_B_CB_C[6]/
EMAC[1]_MRXD[2]/
VIN[1]A_D[3]/
AD25
I
UART3_RXD/
GP3[3]
UART0_DCD/
UART3_RXD/
SPI[0]_SCS[3]/
I2C[2]_SCL/
SD1_POW/
GP1[2]
AH4
I
IPD
DVDD
IPU
DVDD
VOUT[1],
EMAC[1], VIN[1]A,
GP3
PINCNTL211
DSIS: 1
MM: MUX1
UART0, SPI[0],
I2C[2], SD1, GP1
PINCNTL74
DSIS: 1
MM: MUX0
UART3 Receive Data Input. Functions as IrDA receive input
in IrDA modes and CIR receive input in CIR mode.
VOUT[1]_B_CB_C[7]/
EMAC[1]_MRXD[3]/
VIN[1]A_D[4]/
AC25
O
UART3_TXD/
GP3[4]
UART0_DSR/
UART3_TXD/
SPI[0]_SCS[2]/
I2C[2]_SDA/
SD1_SDWP/
GP1[3]
AG4
O
IPD
DVDD
IPU
DVDD
VOUT[1],
EMAC[1], VIN[1]A,
GP3
PINCNTL212
DSIS: PIN
MM: MUX1
UART0, SPI[0],
I2C[2], SD1, GP1
PINCNTL75
DSIS: PIN
MM: MUX0
UART3 Transmit Data Output. Functions as CIR transmit
output in CIR mode.
VOUT[1]_HSYNC/
EMAC[1]_MCOL/
VIN[1]A_VSYNC/
SPI[3]_D[1]/
AC24
O
UART3_RTS/
GP2[29]
UART0_RIN/
UART3_RTS/
UART1_RXD/
GP1[5]
AF4
O
IPD
DVDD
IPU
DVDD
VOUT[1],
EMAC[1], VIN[1]A,
SPI[3], GP2
PINCNTL205
DSIS: PIN
MM: MUX1
UART0, UART1,
GP1
PINCNTL77
DSIS: PIN
MM: MUX0
UART3 Request to Send Output. Indicates module is ready
to receive data. Functions as transmit data output in IrDA
modes.
VOUT[1]_VSYNC/
EMAC[1]_MCRS/
VIN[1]A_FLD/
VIN[1]A_DE/
SPI[3]_D[0]/
UART3_CTS/
GP2[30]
UART0_DTR/
UART3_CTS/
UART1_TXD/
GP1[4]
AA23 I/O
AG2
I/O
IPD
DVDD
IPU
DVDD
VOUT[1],
EMAC[1], VIN[1]A,
SPI[3], GP2
PINCNTL206
DSIS: 1
MM: MUX1
UART3, UART1,
GP1
PINCNTL76
DSIS: 1
MM: MUX0
UART3 Clear to Send Input. Functions as SD transceiver
control output in IrDA and CIR modes.
(1) I = Input, O = Output, Z = High impedance, S = Supply voltage, GND = Ground, A = Analog signal, MM = Multi Muxed, DSIS =
De-selected Input State
(2) IPD = Internal Pulldown Active, IPU = Internal Pullup Active, DIS = Internal Pull Disabled. This represents the default state of the
Internal Pull after Reset. For more detailed information on pullup/pulldown resistors and situations where external pullup/pulldown
resistors are required, see , Pullup/Pulldown Resistors and , Pin Behaviors at Reset.
(3) Specifies the operating I/O supply voltage for each signal
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