TMS320DM8148_1109 Datasheet, PDF (230/360 Pages) Texas Instruments – TMS320DM814x DaVinci Digital Media Processors

TMS320DM8148, TMS320DM8147, TMS320DM8146
SPRS647B – MARCH 2011 – REVISED SEPTEMBER 2011
www.ti.com
Table 8-12. Ethernet MAC Switch Registers (continued)
ARM/L3 MASTERS
EMAC HEX
ADDRESS RANGE
0x4A10 022C
0x4A10 0230
0x4A10 0234
0x4A10 0238
0x4A10 023C
0x4A10 0240
0x4A10 0244
0x4A10 0248
0x4A10 024C
0x4A10 0250
0x4A10 0254
0x4A10 0258
0x4A10 025C
0x4A10 0260
0x4A10 0264
0x4A10 0268
0x4A10 026C
0x4A10 0270
0x4A10 0274
0x4A10 0278
0x4A10 027C
0x4A10 02C0 - 0x4A10 03FC
0x4A10 0400
0x4A10 0404
0x4A10 0408
0x4A10 040C
0x4A10 0410
0x4A10 0414
0x4A10 0418
0x4A10 041C
0x4A10 0420
0x4A10 0424
0x4A10 0428 - 0x4A10 042C
0x4A10 0430
0x4A10 0434
0x4A10 0438
0x4A10 043C
0x4A10 0440
0x4A10 0444
0x4A10 0448
0x4A10 044C
0x4A10 0450
0x4A10 0454
0x4A10 0458
ACRONYM
REGISTER NAME
RX3_HDP
RX4_HDP
RX5_HDP
RX6_HDP
RX7_HDP
TX0_CP
TX1_CP
TX2_CP
TX3_CP
TX4_CP
TX5_CP
TX6_CP
TX7_CP
RX0_CP
RX1_CP
RX2_CP
RX3_CP
RX4_CP
RX5_CP
Rx6_CP
Rx7_CP
CPDMA_STATERAM RX 3 Channel 3 Head Desc Pointer ⁽¹⁾
CPDMA_STATERAM RX 4 Channel 4 Head Desc Pointer ⁽¹⁾
CPDMA_STATERAM RX 5 Channel 5 Head Desc Pointer ⁽¹⁾
CPDMA_STATERAM RX 6 Channel 6 Head Desc Pointer ⁽¹⁾
CPDMA_STATERAM RX 7 Channel 7 Head Desc Pointer ⁽¹⁾
CPDMA_STATERAM TX Channel 0 Completion Pointer Register⁽¹⁾
CPDMA_STATERAM TX Channel 1 Completion Pointer Register ⁽¹⁾
CPDMA_STATERAM TX Channel 2 Completion Pointer Register ⁽¹⁾
CPDMA_STATERAM TX Channel 3 Completion Pointer Register ⁽¹⁾
CPDMA_STATERAM TX Channel 4 Completion Pointer Register ⁽¹⁾
CPDMA_STATERAM TX Channel 5 Completion Pointer Register ⁽¹⁾
CPDMA_STATERAM TX Channel 6 Completion Pointer Register ⁽¹⁾
CPDMA_STATERAM TX Channel 7 Completion Pointer Register ⁽¹⁾
CPDMA_STATERAM RX Channel 0 Completion Pointer Register ⁽¹⁾
CPDMA_STATERAM RX Channel 1 Completion Pointer Register ⁽²⁾
CPDMA_STATERAM RX Channel 2 Completion Pointer Register ⁽²⁾
CPDMA_STATERAM RX Channel 3 Completion Pointer Register ⁽²⁾
CPDMA_STATERAM RX Channel 4 Completion Pointer Register ⁽²⁾
CPDMA_STATERAM RX Channel 5 Completion Pointer Register ⁽²⁾
CPDMA_STATERAM RX Channel 6 Completion Pointer Register ⁽²⁾
CPDMA_STATERAM RX Channel 7 Completion Pointer Register ⁽²⁾
–
Reserved
RXGOODFRAMES
CPSW_STATS Total Number of Good Frames Received
RXBROADCASTFRAMES CPSW_STATS Total Number of Good Broadcast Frames Received
RXMULTICASTFRAMES CPSW_STATS Total Number of Good Multicast Frames Received
RXPAUSEFRAMES CPSW_STATS PauseRxFrames
RXCRCERRORS
CPSW_STATS Total Number of CRC Errors Frames Received
RXALIGNCODEERRORS CPSW_STATS Total Number of Alignment/Code Errors Received
RXOVERSIZEDFRAMES CPSW_STATS Total Number of Oversized Frames Received
RXJABBERFRAMES CPSW_STATS Total number of Jabber Frames Received
RXUNDERSIZEDFRAMES CPSW_STATS Total Number of Undersized Frames Received
RXFRAGMENTS
CPSW_STATS RxFragments Received
–
Reserved. Read as Zero
RXOCTETS
CPSW_STATS Total Number of Received Bytes in Good Frames
TXGOODFRAMES
CPSW_STATS GoodTxFrames
TXBROADCASTFRAMES CPSW_STATS BroadcastTxFrames
TXMULTICASTFRAMES CPSW_STATS MulticastTxFrames
TXPAUSEFRAMES
CPSW_STATS PauseTxFrames
TXDEFERREDFRAMES CPSW_STATS Deferred Frames
TXCOLLISIONFRAMES CPSW_STATS Collisions
TXSINGLECOLLFRAMES CPSW_STATS SingleCollisionTxFrames
TXMULTCOLLFRAMES CPSW_STATS MultipleCollisionTxFrames
TXEXCESSIVECOLLISION CPSW_STATS ExcessiveCollisions
S
TXLATECOLLISIONS CPSW_STATS LateCollisions
(2) Denotes CPPI 3.0 registers.
230 Peripheral Information and Timings
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