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MSP430F5172_16 Datasheet, PDF (7/117 Pages) Texas Instruments – Mixed-Signal Microcontrollers
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www.ti.com
MSP430F5172, MSP430F5152, MSP430F5132
MSP430F5171, MSP430F5151, MSP430F5131
SLAS619P – AUGUST 2010 – REVISED MAY 2016
3 Device Comparison
Table 3-1 summarizes the available family members.
Table 3-1. Device Comparison(1)(2)
DEVICE
FLASH
(KB)
MSP430F5172
32
MSP430F5152
16
MSP430F5132
8
MSP430F5171
32
MSP430F5151
16
MSP430F5131
8
USCI
SRAM
(KB)
Timer_A(3) Timer_D(4)
CHANNEL A:
UART, IrDA,
SPI
CHANNEL B:
SPI, I2C
ADC10_A
(Ch)
Comp_B
(Ch)
I/O
2
3
3, 3
1
9 ext, 2 int
16
31
1
8 ext, 2 int
15
29
2
3
3, 3
1
9 ext, 2 int
16
31
1
8 ext, 2 int
15
29
1
3
3, 3
1
9 ext, 2 int
16
31
1
8 ext, 2 int
15
29
2
3
3, 3
1
16
31
1
–
15
29
2
3
3, 3
1
16
31
1
–
15
29
1
3
3, 3
1
16
31
1
–
15
29
PACKAGE
40 QFN
40 DSBGA
38 TSSOP
40 QFN
40 DSBGA
38 TSSOP
40 QFN
40 DSBGA
38 TSSOP
40 QFN
40 DSBGA
38 TSSOP
40 QFN
40 DSBGA
38 TSSOP
40 QFN
40 DSBGA
38 TSSOP
(1) For the most current package and ordering information, see the Package Option Addendum in Section 8, or see the TI website at
www.ti.com.
(2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
(3) Each number in the sequence represents an instantiation of Timer_A with its associated number of capture compare registers and PWM
output generators available. For example, a number sequence of 3, 5 would represent two instantiations of Timer_A, the first
instantiation having 3 and the second instantiation having 5 capture compare registers and PWM output generators, respectively.
(4) Each number in the sequence represents an instantiation of Timer_D with its associated number of capture compare registers and PWM
output generators available. For example, a number sequence of 3, 5 would represent two instantiations of Timer_D, the first
instantiation having 3 and the second instantiation having 5 capture compare registers and PWM output generators, respectively.
Copyright © 2010–2016, Texas Instruments Incorporated
Device Comparison
7
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