MSP430F5172_16 Datasheet, PDF (66/117 Pages) Texas Instruments – Mixed-Signal Microcontrollers

MSP430F5172, MSP430F5152, MSP430F5132
MSP430F5171, MSP430F5151, MSP430F5131
SLAS619P – AUGUST 2010 – REVISED MAY 2016
www.ti.com
SFR interrupt enable
SFR interrupt flag
SFR reset pin control
Table 6-14. Special Function Registers (Base Address: 0100h)
REGISTER DESCRIPTION
REGISTER
SFRIE1
00h
SFRIFG1
02h
SFRRPCR
04h
OFFSET
Table 6-15. PMM Registers (Base Address: 0120h)
REGISTER DESCRIPTION
PMM control 0
PMM control 1
SVS high-side control
SVS low-side control
PMM interrupt flags
PMM interrupt enable
PMM power mode 5 control
REGISTER
PMMCTL0
PMMCTL1
SVSMHCTL
SVSMLCTL
PMMIFG
PMMIE
PM5CTL0
OFFSET
00h
02h
04h
06h
0Ch
0Eh
10h
Flash control 1
Flash control 3
Flash control 4
Table 6-16. Flash Control Registers (Base Address: 0140h)
REGISTER DESCRIPTION
REGISTER
FCTL1
00h
FCTL3
04h
FCTL4
06h
OFFSET
CRC data input
CRC result
Table 6-17. CRC16 Registers (Base Address: 0150h)
REGISTER DESCRIPTION
REGISTER
CRC16DI
CRC16INIRES
OFFSET
00h
04h
RAM control 0
Table 6-18. RAM Control Registers (Base Address: 0158h)
REGISTER DESCRIPTION
REGISTER
RCCTL0
00h
OFFSET
Watchdog timer control
Table 6-19. Watchdog Registers (Base Address: 015Ch)
REGISTER DESCRIPTION
REGISTER
WDTCTL
OFFSET
00h
UCS control 0
UCS control 1
UCS control 2
UCS control 3
UCS control 4
UCS control 5
UCS control 6
UCS control 7
UCS control 8
Table 6-20. UCS Registers (Base Address: 0160h)
REGISTER DESCRIPTION
REGISTER
UCSCTL0
UCSCTL1
UCSCTL2
UCSCTL3
UCSCTL4
UCSCTL5
UCSCTL6
UCSCTL7
UCSCTL8
OFFSET
00h
02h
04h
06h
08h
0Ah
0Ch
0Eh
10h
66
Detailed Description
Copyright © 2010–2016, Texas Instruments Incorporated
Submit Documentation Feedback
Product Folder Links: MSP430F5172 MSP430F5152 MSP430F5132 MSP430F5171 MSP430F5151 MSP430F5131