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DS90C032B Datasheet, PDF (7/16 Pages) National Semiconductor (TI) – LVDS Quad CMOS Differential Line Receiver
DS90C032B
www.ti.com
SNLS052C – MARCH 1999 – REVISED APRIL 2013
For additional Failsafe Biasing information, please refer to Application Note AN-1194 for more detail.
The footprint of theDS90C032B is the same as the industry standard 26LS32 Quad Differential (RS-422)
Receiver.
For additional LVDS application information, please refer to TI's LVDS Owner's Manual available through TI's
website http://www.ti.com/lvds
Pin No.
2, 6, 10, 14
1, 7, 9, 15
3, 5, 11, 13
4
12
16
8
Name
RIN+
RIN−
ROUT
EN
EN*
VCC
GND
Pin Descriptions
Non-inverting receiver input pin
Inverting receiver input pin
Receiver output pin
Active high enable pin, OR-ed with EN*
Active low enable pin, OR-ed with EN
Power supply pin, +5V ± 10%
Ground pin
Description
Copyright © 1999–2013, Texas Instruments Incorporated
Product Folder Links: DS90C032B
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