DS90C032B Datasheet, PDF (5/16 Pages) National Semiconductor (TI) – LVDS Quad CMOS Differential Line Receiver

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DS90C032B
SNLS052C – MARCH 1999 – REVISED APRIL 2013
Parameter Measurement Information (continued)
C_L includes load and test jig capacitance.
S₁ = V_CC for t_PZL and t_PLZ measurements.
S₁ = GND for t_PZH and t_PHZ measurements.
Figure 4. Receiver TRI-STATE Delay Test Circuit
Figure 5. Receiver TRI-STATE Delay Waveforms
Typical Application
Figure 6. Point-to-Point Application
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