English
Language : 

DS90C032B Datasheet, PDF (2/16 Pages) National Semiconductor (TI) – LVDS Quad CMOS Differential Line Receiver
DS90C032B
SNLS052C – MARCH 1999 – REVISED APRIL 2013
Table 1. Receiver Truth Table
ENABLES
EN
EN*
L
H
All other combinations of ENABLE inputs
INPUTS
RIN+ − RIN−
X
VID ≥ 0.1V
VID ≤ −0.1V
Failsafe OPEN or Terminated
www.ti.com
OUTPUT
ROUT
Z
H
L
H
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Absolute Maximum Ratings(1)
Supply Voltage (VCC)
Input Voltage (RIN+, RIN−)
Enable Input Voltage (EN, EN*)
Output Voltage (ROUT)
Maximum Package Power Dissipation at +25°C
Derate Power Dissipation
Storage Temperature Range
Maximum Lead Temperature, Soldering (4 seconds)
Maximum Junction Temperature
ESD Ratings
HBM, 1.5 kΩ, 100 pF
EIAJ, 0 Ω, 200 pF
−0.3V to +6V
−0.3V to +5.8V
−0.3V to (VCC + 0.3V)
−0.3V to (VCC + 0.3V)
1025 mW
8.2 mW/°C above +25°C
−65°C to +150°C
+260°C
+150°C
≥ 2kV
≥ 250V
(1) “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be ensured. They are not meant to imply
that the devices should be operated at these limits. “Electrical Characteristics” specifies conditions of device operation.
Recommended Operating Conditions
Supply Voltage (VCC)
Receiver Input Voltage
Operating Free Air Temperature (TA)
Min
Typ
Max
Units
+4.5
+5.0
+5.5
V
GND
2.4
V
−40
+25
+85
°C
2
Submit Documentation Feedback
Product Folder Links: DS90C032B
Copyright © 1999–2013, Texas Instruments Incorporated