BQ2022A_17 Datasheet, PDF (7/37 Pages) Texas Instruments – 1K-Bit Serial EPROM with SDQ Interface

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7 Detailed Description
bq2022A
SLUS724E – SEPTEMBER 2006 – REVISED MARCH 2016
7.1 Overview
The Functional Block Diagram shows the relationships among the major control and memory sections of the
bq2022A. The bq2022A has three main data components: a 64-bit factory-programmed ROM, including 8-bit
family code, 48-bit identification number and 8-bit CRC value, 1024-bit EPROM, and EPROM STATUS bytes.
Power for read and write operations is derived from the DATA pin. An internal capacitor stores energy while the
signal line is high and releases energy during the low times of the DATA pin, until the pin returns high to
replenish the charge on the capacitor. A special manufacturer's PROGRAM PROFILE BYTE can be read to
determine the programming profile required to program the part.
7.2 Functional Block Diagram
SDQ 1
VSS 2
SDQ Communications
Controller and 8-Bit CRC
Generation Circuit
bq2022A
Internal
Bus
RAM
Buffer
(8 bytes)
ID ROM
(64 bits)
EPROM
MEMORY
(1024 bits)
EPROM
STATUS
(64 bits)
3 VSS
7.3 Feature Description
7.3.1 1024-Bit EPROM
Table 1 is a memory map of the 1024-bit EPROM section of the bq2022A, configured as four pages of 32 bytes
each. The 8-byte RAM buffers are additional registers used when programming the memory. Data are first
written to the RAM buffer and then verified by reading an 8-bit CRC from the bq2022A that confirms proper
receipt of the data. If the buffer contents are correct, a programming command is issued and an 8-byte segment
of data is written into the selected address in memory. This process ensures data integrity when programming
the memory. The details for reading and programming the 1024-bit EPROM portion of the bq2022A are in the
Memory/Status Function Commands section of this data sheet.
Table 1. 1024-Bit EPROM Data Memory Map
ADDRESS(HEX)
0060-007F
0040-005F
0020-003F
0000-001F
PAGE
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