LM3S2939 Datasheet, PDF (670/749 Pages) Texas Instruments – Stellaris® LM3S2939 Microcontroller

Signal Tables
Table 20-1. Signals by Pin Number (continued)
Pin Number
Pin Name
Pin Type Buffer Type^a Description
PB0
I/O
TTL
GPIO port B bit 0.
66
CCP0
I/O
TTL
Capture/Compare/PWM 0.
PB1
I/O
TTL
GPIO port B bit 1.
67
CCP2
I/O
TTL
Capture/Compare/PWM 2.
68
VDD
-
Power Positive supply for I/O and some logic.
69
GND
-
Power Ground reference for logic and I/O pins.
PB2
I/O
TTL
GPIO port B bit 2.
70
I2C0SCL
I/O
OD
I²C module 0 clock.
PB3
I/O
TTL
GPIO port B bit 3.
71
I2C0SDA
I/O
OD
I²C module 0 data.
72
PE0
I/O
TTL
GPIO port E bit 0.
73
PE1
I/O
TTL
GPIO port E bit 1.
74
PE2
I/O
TTL
GPIO port E bit 2.
75
PE3
I/O
TTL
GPIO port E bit 3.
76
CMOD1
I
TTL
CPU Mode bit 1. Input must be set to logic 0 (grounded); other
encodings reserved.
PC3
I/O
TTL
GPIO port C bit 3.
77
SWO
O
TTL
JTAG TDO and SWO.
TDO
O
TTL
JTAG TDO and SWO.
PC2
I/O
TTL
GPIO port C bit 2.
78
TDI
I
TTL
JTAG TDI.
PC1
I/O
TTL
GPIO port C bit 1.
79
SWDIO
I/O
TTL
JTAG TMS and SWDIO.
TMS
I/O
TTL
JTAG TMS and SWDIO.
PC0
I/O
TTL
GPIO port C bit 0.
80
SWCLK
I
TTL
JTAG/SWD CLK.
TCK
I
TTL
JTAG/SWD CLK.
81
VDD
-
Power Positive supply for I/O and some logic.
82
GND
-
Power Ground reference for logic and I/O pins.
PH3
I/O
TTL
GPIO port H bit 3.
83
PhB0
I
TTL
QEI module 0 phase B.
84
PH2
I/O
TTL
GPIO port H bit 2.
PH1
I/O
TTL
GPIO port H bit 1.
85
PWM3
O
TTL
PWM 3. This signal is controlled by PWM Generator 1.
PH0
I/O
TTL
GPIO port H bit 0.
86
PWM2
O
TTL
PWM 2. This signal is controlled by PWM Generator 1.
87
GND
-
Power Ground reference for logic and I/O pins.
88
VDD25
-
Power Positive supply for most of the logic function, including the
processor core and most peripherals.
PB7
I/O
TTL
GPIO port B bit 7.
89
TRST
I
TTL
JTAG TRST.
670
June 18, 2012
Texas Instruments-Production Data