LM3S2939 Datasheet, PDF (14/749 Pages) Texas Instruments – Stellaris® LM3S2939 Microcontroller

Table of Contents
List of Tables
Table 1.
Table 2.
Table 2-1.
Table 2-2.
Table 2-3.
Table 2-4.
Table 2-5.
Table 2-6.
Table 2-7.
Table 2-8.
Table 2-9.
Table 2-10.
Table 2-11.
Table 2-12.
Table 2-13.
Table 3-1.
Table 3-2.
Table 3-3.
Table 3-4.
Table 3-5.
Table 3-6.
Table 3-7.
Table 3-8.
Table 3-9.
Table 4-1.
Table 4-2.
Table 4-3.
Table 4-4.
Table 5-1.
Table 5-2.
Table 5-3.
Table 5-4.
Table 5-5.
Table 5-6.
Table 5-7.
Table 5-8.
Table 6-1.
Table 6-2.
Table 6-3.
Table 7-1.
Table 7-2.
Table 7-3.
Table 8-1.
Table 8-2.
Table 8-3.
Table 8-4.
Revision History .................................................................................................. 26
Documentation Conventions ................................................................................ 33
Summary of Processor Mode, Privilege Level, and Stack Use ................................ 58
Processor Register Map ....................................................................................... 59
PSR Register Combinations ................................................................................. 64
Memory Map ....................................................................................................... 72
Memory Access Behavior ..................................................................................... 74
SRAM Memory Bit-Banding Regions .................................................................... 76
Peripheral Memory Bit-Banding Regions ............................................................... 77
Exception Types .................................................................................................. 82
Interrupts ............................................................................................................ 83
Exception Return Behavior ................................................................................... 88
Faults ................................................................................................................. 89
Fault Status and Fault Address Registers .............................................................. 90
Cortex-M3 Instruction Summary ........................................................................... 92
Core Peripheral Register Regions ......................................................................... 95
Memory Attributes Summary ................................................................................ 98
TEX, S, C, and B Bit Field Encoding ................................................................... 101
Cache Policy for Memory Attribute Encoding ....................................................... 102
AP Bit Field Encoding ........................................................................................ 102
Memory Region Attributes for Stellaris Microcontrollers ........................................ 102
Peripherals Register Map ................................................................................... 103
Interrupt Priority Levels ...................................................................................... 128
Example SIZE Field Values ................................................................................ 156
JTAG_SWD_SWO Signals (100LQFP) ................................................................ 160
JTAG_SWD_SWO Signals (108BGA) ................................................................. 161
JTAG Port Pins Reset State ............................................................................... 161
JTAG Instruction Register Commands ................................................................. 168
System Control & Clocks Signals (100LQFP) ...................................................... 172
System Control & Clocks Signals (108BGA) ........................................................ 172
Reset Sources ................................................................................................... 173
Clock Source Options ........................................................................................ 178
Possible System Clock Frequencies Using the SYSDIV Field ............................... 181
Examples of Possible System Clock Frequencies Using the SYSDIV2 Field .......... 181
System Control Register Map ............................................................................. 185
RCC2 Fields that Override RCC fields ................................................................. 200
Hibernate Signals (100LQFP) ............................................................................. 239
Hibernate Signals (108BGA) .............................................................................. 240
Hibernation Module Register Map ....................................................................... 246
Flash Protection Policy Combinations ................................................................. 260
User-Programmable Flash Memory Resident Registers ....................................... 263
Flash Register Map ............................................................................................ 263
GPIO Pins With Non-Zero Reset Values .............................................................. 286
GPIO Pins and Alternate Functions (100LQFP) ................................................... 286
GPIO Pins and Alternate Functions (108BGA) ..................................................... 287
GPIO Signals (100LQFP) ................................................................................... 289
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June 18, 2012
Texas Instruments-Production Data