LM3S2939 Datasheet, PDF (24/749 Pages) Texas Instruments – Stellaris® LM3S2939 Microcontroller

Table of Contents
Register 32:
Register 33:
Register 34:
Register 35:
Register 36:
Register 37:
CAN New Data 1 (CANNWDA1), offset 0x120 ................................................................. 593
CAN New Data 2 (CANNWDA2), offset 0x124 ................................................................. 593
CAN Message 1 Interrupt Pending (CANMSG1INT), offset 0x140 ..................................... 594
CAN Message 2 Interrupt Pending (CANMSG2INT), offset 0x144 ..................................... 594
CAN Message 1 Valid (CANMSG1VAL), offset 0x160 ....................................................... 595
CAN Message 2 Valid (CANMSG2VAL), offset 0x164 ....................................................... 595
Analog Comparators ................................................................................................................... 596
Register 1: Analog Comparator Masked Interrupt Status (ACMIS), offset 0x000 .................................. 602
Register 2: Analog Comparator Raw Interrupt Status (ACRIS), offset 0x004 ....................................... 603
Register 3: Analog Comparator Interrupt Enable (ACINTEN), offset 0x008 ......................................... 604
Register 4: Analog Comparator Reference Voltage Control (ACREFCTL), offset 0x010 ....................... 605
Register 5: Analog Comparator Status 0 (ACSTAT0), offset 0x020 ..................................................... 606
Register 6: Analog Comparator Status 1 (ACSTAT1), offset 0x040 ..................................................... 606
Register 7: Analog Comparator Status 2 (ACSTAT2), offset 0x060 ..................................................... 606
Register 8: Analog Comparator Control 0 (ACCTL0), offset 0x024 ..................................................... 607
Register 9: Analog Comparator Control 1 (ACCTL1), offset 0x044 ..................................................... 607
Register 10: Analog Comparator Control 2 (ACCTL2), offset 0x064 .................................................... 607
Pulse Width Modulator (PWM) .................................................................................................... 609
Register 1: PWM Master Control (PWMCTL), offset 0x000 ................................................................ 618
Register 2: PWM Time Base Sync (PWMSYNC), offset 0x004 ........................................................... 619
Register 3: PWM Output Enable (PWMENABLE), offset 0x008 .......................................................... 620
Register 4: PWM Output Inversion (PWMINVERT), offset 0x00C ....................................................... 621
Register 5: PWM Output Fault (PWMFAULT), offset 0x010 ................................................................ 622
Register 6: PWM Interrupt Enable (PWMINTEN), offset 0x014 ........................................................... 623
Register 7: PWM Raw Interrupt Status (PWMRIS), offset 0x018 ........................................................ 624
Register 8: PWM Interrupt Status and Clear (PWMISC), offset 0x01C ................................................ 625
Register 9: PWM Status (PWMSTATUS), offset 0x020 ...................................................................... 626
Register 10: PWM0 Control (PWM0CTL), offset 0x040 ....................................................................... 627
Register 11: PWM1 Control (PWM1CTL), offset 0x080 ....................................................................... 627
Register 12: PWM0 Interrupt and Trigger Enable (PWM0INTEN), offset 0x044 .................................... 629
Register 13: PWM1 Interrupt and Trigger Enable (PWM1INTEN), offset 0x084 .................................... 629
Register 14: PWM0 Raw Interrupt Status (PWM0RIS), offset 0x048 .................................................... 632
Register 15: PWM1 Raw Interrupt Status (PWM1RIS), offset 0x088 .................................................... 632
Register 16: PWM0 Interrupt Status and Clear (PWM0ISC), offset 0x04C ........................................... 633
Register 17: PWM1 Interrupt Status and Clear (PWM1ISC), offset 0x08C ........................................... 633
Register 18: PWM0 Load (PWM0LOAD), offset 0x050 ....................................................................... 634
Register 19: PWM1 Load (PWM1LOAD), offset 0x090 ....................................................................... 634
Register 20: PWM0 Counter (PWM0COUNT), offset 0x054 ................................................................ 635
Register 21: PWM1 Counter (PWM1COUNT), offset 0x094 ................................................................ 635
Register 22: PWM0 Compare A (PWM0CMPA), offset 0x058 ............................................................. 636
Register 23: PWM1 Compare A (PWM1CMPA), offset 0x098 ............................................................. 636
Register 24: PWM0 Compare B (PWM0CMPB), offset 0x05C ............................................................. 637
Register 25: PWM1 Compare B (PWM1CMPB), offset 0x09C ............................................................. 637
Register 26: PWM0 Generator A Control (PWM0GENA), offset 0x060 ................................................ 638
Register 27: PWM1 Generator A Control (PWM1GENA), offset 0x0A0 ................................................ 638
Register 28: PWM0 Generator B Control (PWM0GENB), offset 0x064 ................................................ 641
Register 29: PWM1 Generator B Control (PWM1GENB), offset 0x0A4 ................................................ 641
Register 30: PWM0 Dead-Band Control (PWM0DBCTL), offset 0x068 ................................................ 644
24
June 18, 2012
Texas Instruments-Production Data