LM3S2939 Datasheet, PDF (11/749 Pages) Texas Instruments – Stellaris® LM3S2939 Microcontroller

Stellaris^® LM3S2939 Microcontroller
List of Figures
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Stellaris LM3S2939 Microcontroller High-Level Block Diagram ............................... 45
CPU Block Diagram ............................................................................................. 55
TPIU Block Diagram ............................................................................................ 56
Cortex-M3 Register Set ........................................................................................ 58
Bit-Band Mapping ................................................................................................ 78
Data Storage ....................................................................................................... 79
Vector Table ........................................................................................................ 85
Exception Stack Frame ........................................................................................ 87
SRD Use Example ............................................................................................. 101
JTAG Module Block Diagram .............................................................................. 160
Test Access Port State Machine ......................................................................... 164
IDCODE Register Format ................................................................................... 170
BYPASS Register Format ................................................................................... 170
Boundary Scan Register Format ......................................................................... 171
Basic RST Configuration .................................................................................... 174
External Circuitry to Extend Power-On Reset ....................................................... 175
Reset Circuit Controlled by Switch ...................................................................... 175
Power Architecture ............................................................................................ 177
Main Clock Tree ................................................................................................ 180
Hibernation Module Block Diagram ..................................................................... 239
Clock Source Using Crystal ................................................................................ 241
Clock Source Using Dedicated Oscillator ............................................................. 242
Flash Block Diagram .......................................................................................... 259
GPIO Port Block Diagram ................................................................................... 293
GPIODATA Write Example ................................................................................. 294
GPIODATA Read Example ................................................................................. 294
GPTM Module Block Diagram ............................................................................ 335
16-Bit Input Edge Count Mode Example .............................................................. 339
16-Bit Input Edge Time Mode Example ............................................................... 340
16-Bit PWM Mode Example ................................................................................ 341
WDT Module Block Diagram .............................................................................. 371
ADC Module Block Diagram ............................................................................... 395
Differential Sampling Range, V_{IN_ODD} = 1.5 V ...................................................... 399
Differential Sampling Range, V_{IN_ODD} = 0.75 V .................................................... 399
Differential Sampling Range, V_{IN_ODD} = 2.25 V .................................................... 400
Internal Temperature Sensor Characteristic ......................................................... 401
UART Module Block Diagram ............................................................................. 432
UART Character Frame ..................................................................................... 434
IrDA Data Modulation ......................................................................................... 436
SSI Module Block Diagram ................................................................................. 474
TI Synchronous Serial Frame Format (Single Transfer) ........................................ 477
TI Synchronous Serial Frame Format (Continuous Transfer) ................................ 478
Freescale SPI Format (Single Transfer) with SPO=0 and SPH=0 .......................... 478
Freescale SPI Format (Continuous Transfer) with SPO=0 and SPH=0 .................. 479
Freescale SPI Frame Format with SPO=0 and SPH=1 ......................................... 480
Freescale SPI Frame Format (Single Transfer) with SPO=1 and SPH=0 ............... 480
June 18, 2012
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