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BQ25700A Datasheet, PDF (67/82 Pages) Texas Instruments – SMBus Multi-Chemistry Battery Buck-Boost Charge Controller With System Power Monitor and Processor Hot Monitor
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bq25700A
SLUSCQ8 – MAY 2017
Low ESR ceramic capacitor such as X7R or X5R is preferred for input decoupling capacitor and should be
placed to the drain of the high side MOSFET and source of the low side MOSFET as close as possible. Voltage
rating of the capacitor must be higher than normal input voltage level. 25 V rating or higher capacitor is preferred
for 19 V - 20 V input voltage. Minimum 4 - 6 pcs of 10-µF 0805 size capacitor is suggested for 45 - 65 W adapter
design.
Ceramic capacitors show a dc-bias effect. This effect reduces the effective capacitance when a dc-bias voltage is
applied across a ceramic capacitor, as on the input capacitor of a charger. The effect may lead to a significant
capacitance drop, especially for high input voltages and small capacitor packages. See the manufacturer's
datasheet about the performance with a dc bias voltage applied. It may be necessary to choose a higher voltage
rating or nominal capacitance value in order to get the required value at the operating point.
9.2.2.5 Output Capacitor
Output capacitor also should have enough ripple current rating to absorb output switching ripple current. In buck
mode the output capacitor RMS current is given:
To get good loop stability, the resonant frequency of the output inductor and output capacitor should be designed
between 10 kHz and 20 kHz. The preferred ceramic capacitor is 25-V X7R or X5R for output capacitor. Minimum
6 pcs of 10-µF 0805 size capacitor is suggested to be placed by the inductor. Place the capacitors after Q4
drain. Place minimum 10 µF after the charge current sense resistor for best stability.
Ceramic capacitors show a dc-bias effect. This effect reduces the effective capacitance when a dc-bias voltage is
applied across a ceramic capacitor, as on the output capacitor of a charger. The effect may lead to a significant
capacitance drop, especially for high output voltages and small capacitor packages. See the manufacturer's data
sheet about the performance with a dc bias voltage applied. It may be necessary to choose a higher voltage
rating or nominal capacitance value in order to get the required value at the operating point.
9.2.2.6 Power MOSFETs Selection
Four external N-channel MOSFETs are used for a synchronous switching battery charger. The gate drivers are
internally integrated into the IC with 6 V of gate drive voltage. 30 V or higher voltage rating MOSFETs are
preferred for 19 V - 20 V input voltage.
Figure-of-merit (FOM) is usually used for selecting proper MOSFET based on a tradeoff between the conduction
loss and switching loss. For the top side MOSFET, FOM is defined as the product of a MOSFET's on-resistance,
RDS(ON), and the gate-to-drain charge, QGD. For the bottom side MOSFET, FOM is defined as the product of the
MOSFET's on-resistance, RDS(ON), and the total gate charge, QG.
FOMtop = RDS(on) x QGD; FOMbottom = RDS(on) x QG
(6)
The lower the FOM value, the lower the total power loss. Usually lower RDS(ON) has higher cost with the same
package size.
The top-side MOSFET loss includes conduction loss and switching loss. It is a function of duty cycle
(D=VOUT/VIN), charging current (ICHG), MOSFET's on-resistance (RDS(ON)), input voltage (VIN), switching frequency
(fS), turn on time (ton) and turn off time (toff):
Ptop = D ´ ICHG2
´ RDS(on) +
1
2
´ VIN
´ ICHG
´ (ton + toff ) ´ fs
(7)
The first item represents the conduction loss. Usually MOSFET RDS(ON) increases by 50% with 100°C junction
temperature rise. The second term represents the switching loss. The MOSFET turn-on and turn-off times are
given by:
ton
=
QSW ,
Ion
toff
=
QSW
Ioff
(8)
where Qsw is the switching charge, Ion is the turn-on gate driving current and Ioff is the turn-off gate driving
current. If the switching charge is not given in MOSFET datasheet, it can be estimated by gate-to-drain charge
(QGD) and gate-to-source charge (QGS):
1
QSW = QGD + 2 ´ QGS
(9)
Gate driving current can be estimated by REGN voltage (VREGN), MOSFET plateau voltage (Vplt), total turn-on
gate resistance (Ron) and turn-off gate resistance (Roff) of the gate driver:
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