BQ25700A Datasheet, PDF (44/82 Pages) Texas Instruments – SMBus Multi-Chemistry Battery Buck-Boost Charge Controller With System Power Monitor and Processor Hot Monitor

bq25700A
SLUSCQ8 – MAY 2017
8.6.1.7 ADCOption Register (SMBus address = 35h) [reset = 2000h]
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Figure 23. ADCOption Register (SMBus address = 35h) [reset = 2000h]
15
ADC_CONV
R/W
14
ADC_START
R/W
13
ADC_
FULLSCALE
R/W
7
6
5
4
EN_ADC_
CMPIN
EN_ADC_
VBUS
EN_ADC_
PSYS
EN_ADC_
IIN
R/W
R/W
R/W
R/W
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
3
EN_ADC_
IDCHG
R/W
12-8
Reserved
R/W
2
EN_ADC_
ICHG
R/W
1
EN_ADC_
VSYS
R/W
0
EN_ADC_
VBAT
R/W
The ADC registers are read in the following order: VBAT, VSYS, ICHG, IDCHG, IIN, PSYS, VBUS, CMPIN. ADC
is disabled in low power mode. When enabling ADC, the device exit low power mode at battery only.
Table 19. ADCOption Register (SMBus address = 35h) Field Descriptions
SMBus
BIT
15
14
13
12-8
FIELD
TYPE RESET DESCRIPTION
ADC_CONV
R/W
0b
Typical ADC conversion time is 10 ms.
0b: One-shot update. Do one set of conversion updates to registers
REG0x23(), REG0x24(), REG0x25(), and REG0x26() after ADC_START =
1.
1b: Continuous update. Do a set of conversion updates to registers
REG0x23(), REG0x24(), REG0x25(), and REG0x26() every 1 sec.
ADC_START
R/W
0b
0b: No ADC conversion
1b: Start ADC conversion. After the one-shot update is complete, this bit
automatically resets to zero
ADC_
FULLSCALE
R/W
1b
ADC input voltage range. When input voltage is below 5 V, or battery is 1S,
full scale 2.04 V is recommended.
0b: 2.04 V
1b: 3.06 V <default at POR>
Reserved
R/W
00000b Reserved
Table 20. ADCOption Register (SMBus address = 35h) Field Descriptions
SMBus
BIT
7
FIELD
EN_ADC_CMPIN
6
EN_ADC_VBUS
5
EN_ADC_PSYS
4
EN_ADC_IIN
3
EN_ADC_IDCHG
2
EN_ADC_ICHG
1
EN_ADC_VSYS
0
EN_ADC_VBAT
TYPE
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
RESET
0b
0b
0b
0b
0b
0b
0b
0b
DESCRIPTION
0b: Disable <default at POR>
1b: Enable
0b: Disable <default at POR>
1b: Enable
0b: Disable <default at POR>
1b: Enable
0b: Disable <default at POR>
1b: Enable
0b: Disable <default at POR>
1b: Enable
0b: Disable <default at POR>
1b: Enable
0b: Disable <default at POR>
1b: Enable
0b: Disable <default at POR>
1b: Enable
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