ADC32RF44 Datasheet, PDF (67/134 Pages) Texas Instruments – Dual-Channel, 14-Bit, 2.6-GSPS, Analog-to-Digital Converter

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ADC32RF44
SBAS809 – FEBRUARY 2017
Register Maps (continued)
Table 28. Register Map (continued)
REGISTER
REGISTER DATA
ADDRESS
A[11:0] (Hex)
7
6
5
4
3
2
1
0
Digital Gain Page Channel B (610105, M = 1)
0A6
0
0
0
0
DIGITAL GAIN
Main Digital Page Channel A (680000h, M = 1)
000
0
0
0
0
0
0
0
DIG CORE RESET
GBL
0A2
0
0
0
0
NQ ZONE EN
NYQUIST ZONE
Main Digital Page Channel B (680100h, M = 1)
000
0
0
0
0
0
0
0
0
0A2
0
0
0
0
NQ ZONE EN
NYQUIST ZONE
JESD DIGITAL PAGE (690000h, M = 1)
001
CTRL K
0
0
TESTMODE EN
0
LANE ALIGN
FRAME ALIGN
TX LINK DIS
002
SYNC REG
SYNC REG EN
0
0
12BIT MODE
JESD MODE0
003
LINK LAYER TESTMODE
LINK LAY RPAT
LMFC MASK
RESET
JESD MODE1
JESD MODE2
RAMP 12BIT
004
0
0
0
0
0
0
REL ILA SEQ
006
SCRAMBLE EN
0
0
0
0
0
0
0
007
0
0
0
FRAMES PER MULTIFRAME (K)
016
LANE 0
LANE 1
LANE 2
LANE 3
017
0
0
0
0
LANE0
POL
LANE1
POL
LANE2
POL
LANE3
POL
032
SEL EMP LANE 0
0
0
033
SEL EMP LANE 1
0
0
034
SEL EMP LANE 2
0
0
035
SEL EMP LANE 3
0
0
036
80X MODE EN
CMOS SYNCB
0
0
0
0
0
0
037
0
0
0
0
0
0
PLL MODE
03E
0
MASK CLKDIV
SYSREF
MASK NCO
SYSREF
0
0
0
0
0
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